EPCS16SI16N Altera, EPCS16SI16N Datasheet - Page 23

• Manufacturer Part Number: EPCS16SI16N
• Description: IC CONFIG DEVICE 16MBIT 16-SOIC
• Manufacturer: Altera
• Series: EPCSr

Specifications of EPCS16SI16N

• Programmable Type: In System Programmable
• Memory Size: 16Mb
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.50mm Width)
• Memory Type: Flash
• Clock Frequency: 20MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1240-5; EPCS16SI16

Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet
Serial Configuration Device Memory Access
Figure 3–13. Read Silicon ID Operation Timing Diagram
Note to
(1) Only EPCS1, EPCS4, EPCS16, and EPCS64 support Read Silicon ID operation.
June 2011 Altera Corporation
Figure
DCLK
ASDI
DATA
nCS
3–13:
The device implements the read silicon ID operation by driving nCS low then shifting
in the read silicon ID operation code followed by three dummy bytes on ASDI. The
serial configuration device’s 8-bit silicon ID is then shifted out on the DATA pin on the
falling edge of DCLK, as shown in
silicon ID operation by driving nCS high after the silicon ID has been read at least
once. Sending additional clock cycles on DCLK while nCS is driven low can cause the
silicon ID to be shifted out repeatedly.
Read Device Identification Operation
The read device identification operation code is b’1001 1111, with the MSB listed
first. Only EPCS128 supports this operation. It reads the serial configuration device’s
8-bit device identification from the DATA output pin. If this operation is shifted in
during an erase or write cycle, it is ignored and has no effect on the cycle that is in
progress.
Table 3–15. Serial Configuration Device Identification
The device implements the read device identification operation by driving nCS low
then shifting in the read device identification operation code followed by two dummy
byte on ASDI. The serial configuration device’s 16-bit device identification is then
shifted out on the DATA pin on the falling edge of DCLK, as shown in
device can terminate the read device identification operation by driving nCS high after
reading the device identification at least once.
0
High Impedance
1
2
Operation Code
Serial Configuration Device
3
Table 3–15
4
5
EPCS128
6
shows the serial configuration device identification.
7
MSB
23
8
22
9
21
10
(Note 1)
Three Dummy Bytes
Figure
3
28
3–13. The device can terminate the read
2
29
1
30
0
31
MSB
7
32
6
33
Silicon ID (Binary Value)
5
34
b'0001 1000
4
35
Silicon ID
Volume 2: Configuration Handbook
3
36
2
37
Figure
1
38
0
39
3–14. The
3–23