PCA9512AD,112 NXP Semiconductors, PCA9512AD,112 Datasheet - Page 4

• Manufacturer Part Number: PCA9512AD,112
• Description: IC LEVSHIFT I2C/SMBUS BUFF 8SOIC
• Manufacturer: NXP Semiconductors
• Type: I²C-Bus and SMBus Switchr

Specifications of PCA9512AD,112

• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Applications: Hot-Swap/SMB Buffer
• Internal Switch(s): Yes
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Logic Family: PCA
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 3 / 3
• Logic Type: Bus Buffer
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3361-5; 935279721112; PCA9512AD

Philips Semiconductors
7. Pinning information
8. Functional description
PCA9512A_1
Product data sheet
7.1 Pinning
7.2 Pin description
8.1 Start-up
Table 3:
Refer to
When the PCA9512A is powered up, either V
more positive or they may be equal, however the PCA9512A will not leave the
undervoltage lock out or initialization state until both V
2.5 V. If either V
state. In the undervoltage lock out state the connection circuitry is disabled, the rise time
accelerators are disabled, and the precharge circuitry is also disabled. After both V
V
state; during this state the 1 V precharge circuitry is activated and pulls up the SDAn and
SCLn pins to 1 V through individual 100 k nominal resistors. At the end of the
initialization state the ‘Stop bit and bus idle’ detect circuit is enabled. When all the SDAn
and SCLn pins have been HIGH for the bus idle time or when all pins are HIGH and a
Symbol
V
SCLOUT
SCLIN
GND
ACC
SDAIN
SDAOUT
V
Fig 2. Pin configuration for SO8
CC2
CC2
CC
are valid, independent of which is higher, the PCA9512A enters the initialization
SCLOUT
SCLIN
V
Figure 1 “Block diagram of
GND
CC2
Pin description
Pin
1
2
3
4
5
6
7
8
1
2
3
4
CC
PCA9512AD
or V
Description
Supply voltage for devices on the card I
from SDAOUT and SCLOUT to this pin.
serial clock output to and from the SCL bus on the card
serial clock input to and from the SCL bus on the backplane
ground supply; connect this pin to a ground plane for best results.
CMOS threshold digital input pin that enables and disables the rise time
accelerators on all four SDAn and SCLn pins. ACC enables all accelerators
when set to V
serial data input to and from the SDA bus on the backplane
serial data output to and from the SDA bus on the card
supply voltage; from the backplane, connect pull-up resistors from SDAIN
and SCLIN to this pin.
002aab789
Rev. 01 — 7 October 2005
CC2
Level shifting hot swappable I
drops below 2.0 V it will return to the undervoltage lock out
8
7
6
5
CC2
V
SDAOUT
SDAIN
ACC
CC
, and turns them off when set to GND.
PCA9512A”.
CC
Fig 3. Pin configuration for TSSOP8
or V
SCLOUT
SCLIN
V
CC2
GND
CC2
CC
2
C-buses. Connect pull-up resistors
may rise first and either may be
and V
2
1
2
3
4
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
C-bus and SMBus bus buffer
PCA9512ADP
CC2
PCA9512A
have gone above
002aab790
8
7
6
5
V
SDAOUT
SDAIN
ACC
CC
CC
4 of 22
and