PCA9512AD,112 NXP Semiconductors, PCA9512AD,112 Datasheet - Page 7

• Manufacturer Part Number: PCA9512AD,112
• Description: IC LEVSHIFT I2C/SMBUS BUFF 8SOIC
• Manufacturer: NXP Semiconductors
• Type: I²C-Bus and SMBus Switchr

Specifications of PCA9512AD,112

• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Applications: Hot-Swap/SMB Buffer
• Internal Switch(s): Yes
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Logic Family: PCA
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 3 / 3
• Logic Type: Bus Buffer
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3361-5; 935279721112; PCA9512AD

Philips Semiconductors
PCA9512A_1
Product data sheet
8.5 Rise time accelerators
8.6 ACC boost current enable
8.7 Resistor pull-up value selection
rate is slow enough that the output catches up it will still lag the falling voltage of the input
by the offset voltage. The maximum t
delay and the output is still limited by its turn-on delay and the falling edge slew rate. The
output falling edge slew rate is a function of the internal maximum slew rate which is a
function of temperature, V
capacitance.
During positive bus transactions, a 2 mA current source is switched on to quickly slew the
SDA and SCL lines HIGH once the input level of 0.6 V for the PCA9512A is exceeded.
The rising edge rate should be at least 1.25 V/ s to guarantee turn on of the accelerators.
Users having lightly loaded systems may wish to disable the rise time accelerators.
Driving this pin to ground turns off the rise time accelerators on all four SDAn and SCLn
pins. Driving this pin to the V
accelerators.
The system pull-up resistors must be strong enough to provide a positive slew rate of
1.25 V/ s on the SDAn and SCLn pins, in order to activate the boost pull-up currents
during rising edges. Choose maximum resistor value using the formula:
where R
and C is the equivalent bus capacitance in picofarads.
In addition, regardless of the bus capacitance, always choose R
V
requires logic HIGH voltages on SDAOUT and SCLOUT to connect the backplane to the
card, and these pull-up values are needed to overcome the precharge voltage. See the
curves in
R
CC
PU
= 5.5 V maximum, R
800 10
PU
Figure 5
is the pull-up resistor value in , V
3
V
---------------------------------- -
CC min
and
Rev. 01 — 7 October 2005
C
Figure 6
PU
Level shifting hot swappable I
CC
–
0.6
or V
CC2
24 k for V
for guidance in resistor pull-up selection.
CC2
voltage enables normal operation of the rise time
and process, as well as the load current and the load
PHL
occurs when the input is driven LOW with zero
CC
= 3.6 V maximum. The start-up circuitry
CC(min)
is the minimum V
2
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
C-bus and SMBus bus buffer
PU
PCA9512A
16 k for
CC
voltage in volts,
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