SI3402-A-GM Silicon Laboratories Inc, SI3402-A-GM Datasheet - Page 13

IC POE PD LOW EMI SW REG 20VQFN

SI3402-A-GM

Manufacturer Part Number
SI3402-A-GM
Description
IC POE PD LOW EMI SW REG 20VQFN
Manufacturer
Silicon Laboratories Inc
Type
Power over Ethernet Switch (PoE)r
Datasheet

Specifications of SI3402-A-GM

Package / Case
20-VQFN
Applications
IP Phones, Power over LAN, Network Routers and Switches
Internal Switch(s)
Yes
Current Limit
470mA
Voltage - Supply
2.8 V ~ 57 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Product
PoE / LAN Solutions
Supply Voltage (max)
57 V
Supply Voltage (min)
2.8 V
Power Dissipation
1.2 W
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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The 802.3 specification limits the classification time to
75 ms to limit the power dissipated in the PD. If the PSE
classification period exceeds 75 ms and the die
temperature rises above the thermal shutdown limits,
the thermal protection circuit will engage and disable
the classification current source in order to protect the
Si3402. The Si3402 stays in classification mode until
the input voltage exceeds 22 V (the upper end of its
classification operation region).
3.2.4. Under Voltage Lockout
The 802.3 standard specifies the PD to turn on when
the line voltage rises to 42 V and for the PD to turn off
when the line voltage falls to 30 V. The PD must also
maintain a large on-off hysteresis region to prevent
wiring losses between the PSE and the PD from
causing startup oscillation.
The Si3402 incorporates an undervoltage lockout
(UVLO) circuit to monitor the line voltage and determine
when to apply power to the integrated switching
regulator. Before the power is applied to the switching
regulator, the hotswap switch output (HSO) pin is high-
impedance and typically follows VPOS as the input is
ramped (due to the discharged switcher supply
capacitor). When the input voltage rises above the
UVLO turn-on threshold, the Si3402 begins to turn on
the internal hotswap power MOSFET. The switcher
supply capacitor begins to charge up under the current
limit control of the Si3402, and the HSO pin transitions
from VPOS to VNEG. The Si3402 includes hysteretic
UVLO circuits to maintain power to the load until the
input voltage falls below the UVLO turn-off threshold.
Once the input voltage falls below 30 V, the internal
hotswap MOSFET is turned off.
Class
0
1
2
3
4
Optional
Optional
Optional
Usage
Default
PoE+
Table 11. Class Resistor Values
Peak Power Levels
0.44 to 12.95 W
6.49 to 12.95 W
0.44 to 3.84 W
3.84 to 6.49 W
12.95 to 17 W
Rev. 1.1
3.2.5. Dual Current Limit and Switcher Turn-On
The Si3402 implements dual current limits. While the
hotswap MOSFET is charging the switcher supply
capacitor, the Si3402 maintains a low current limit. The
switching regulator is disabled until the voltage across
the hotswap MOSFET becomes sufficiently low,
indicating the switcher supply capacitor is almost
completely charged. When this threshold is reached,
the switcher is activated, and the hotswap current limit
is increased. This threshold also has hysteresis to
prevent systemic oscillation as the switcher begins to
draw current and the current limit is increased, which
allows resistive losses in the cable to effectively
decrease the input supply.
The Si3402 stays in a high-level current limit mode until
the input voltage drops below the UVLO turn-off
threshold or excessive power is dissipated in the
hotswap switch. This dual level current limit allows the
system designer to design powered devices for use with
both legacy and compliant PoE systems.
An additional feature of the dual current limit circuitry is
foldback current limiting in the event of a fault condition.
When the current limit is switched to the higher level,
400 mA of current can be drawn by the PD. Should a
fault cause more than this current to be consumed, the
voltage across the hotswap MOSFET will increase to
clamp the maximum amount of power consumed. The
power dissipated by the MOSFET can be very high
under this condition. If the fault is very low impedance,
the voltage across the hotswap MOSFET will continue
to rise until the lower current limit level is engaged,
further reducing the dissipated power. If the fault
condition remains, the thermal overload protection
circuitry will eventually engage and shut down the
hotswap interface and switching regulator. The foldback
current limiting occurs much faster than the thermal
overload protection and is, therefore, necessary for
comprehensive protection of the hotswap MOSFET.
Nominal Class
Current
10.5 mA
18.5 mA
< 4 mA
28 mA
40 mA
RCL Resistor (1%,
(or open circuit)
> 1.33 k
1/16 W)
Si3402
69.8 
45.3 
30.9 
127 
13

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