SI3402-A-GM Silicon Laboratories Inc, SI3402-A-GM Datasheet - Page 7

• Manufacturer Part Number: SI3402-A-GM
• Description: IC POE PD LOW EMI SW REG 20VQFN
• Manufacturer: Silicon Laboratories Inc
• Type: Power over Ethernet Switch (PoE)r

Specifications of SI3402-A-GM

• Package / Case: 20-VQFN
• Applications: IP Phones, Power over LAN, Network Routers and Switches
• Internal Switch(s): Yes
• Current Limit: 470mA
• Voltage - Supply: 2.8 V ~ 57 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Product: PoE / LAN Solutions
• Supply Voltage (max): 57 V
• Supply Voltage (min): 2.8 V
• Power Dissipation: 1.2 W
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 5. Electrical Characteristics
Parameter
VPORT
Input Offset Current
Diode Bridge Leakage
IPORT Classification
IPORT Operating Current
Current Limit
Hotswap FET On-Resistance +
R
Power Loss VPORT Threshold
Switcher Frequency
Maximum Switcher Duty Cycle
Switching FET On-Resistance
Regulated Feedback @ Pin FB
Regulated Output Voltage Tolerance
Notes:
SENSE
1. Transient surge defined in IEC60060 as a 1000 V impulse of either polarity applied to CT1–CT2 or SP1–SP2. The
2. The classification currents are guaranteed only when recommended RCLASS resistors are used, as specified in
3. IPORT includes full operating current of switching regulator controller.
4. The PD interface includes dual-level input current limit. At turn-on, before the HSO load capacitor is charged, the
5. See “AN296: Using the Si3400/1/2 PoE PD Controller in Isolated and Non-Isolated Designs” for more information.
6. Applies to non-isolated applications only (VOUT on schematic in Figure 1).
shape of the impulse shall have a 300 ns full rise time and a 50 µs half fall time with 201  source impedance.
Table 11.
current limit is set at the inrush level. After the capacitor has been charged within ~1.25 V of VNEG, the operating
current limit is engaged. This higher current limit remains active until the UVLO lower limit has been tripped or until the
hotswap switch is sufficiently current-limited to cause a foldback of the HSO voltage.
4
2
3
5
6
6
Output voltage tolerance @
ISOSSFT connected to
36 V < VPORT < 57 V
36 V < VPORT < 57 V
Transient Surge
UVLO Turn Off
UVLO Turn On
VPORT < 10 V
VPORT = 57 V
Classification
Description
Operating
Detection
DC Avg.
Class 0
Class 1
Class 2
Class 3
Class 4
Inrush
VOUT
VDD
Rev. 1.1
1
Min
470
2.7
0.5
0.3
14
30
27
—
62
—
—
17
26
36
—
—
—
—
—
–5
0
9
1.23
Typ
350
140
30
50
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
Max
0.86
680
3.1
1.5
33
11
22
42
36
79
10
25
12
20
30
44
—
—
—
—
4
5
Si3402
Unit
kHz
mA
mA
µA
µA
mA
mA
%
%


V
V
V
7