MC33888FB Freescale Semiconductor, MC33888FB Datasheet - Page 35

• Manufacturer Part Number: MC33888FB
• Description: IC SWITCH QUAD H-SIDE W/CS 64QFP
• Manufacturer: Freescale Semiconductor
• Type: High Side/Low Side Driverr

Specifications of MC33888FB

• Input Type: SPI
• Number Of Outputs: 12 ( 4 High Side, 8 Low Side)
• On-state Resistance: 40 mOhm
• Current - Output / Channel: 10A
• Current - Peak Output: 60A
• Voltage - Supply: 6 V ~ 27 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
Introduction
datasheet. The addendum provides thermal performance information that may be
critical in the design and development of system applications. All electrical,
application, and packaging information is provided in the datasheet.
Packaging and Thermal Considerations
independently heating with P
T
temperature while only heat source 1 is heating with P
reference temperature while heat source 2 is heating with P
and Rθ
This methodology is not meant to and will not predict the performance of a package in an application-specific environment. Stated
values were obtained by measurement and simulation according to the standards listed below.
Standards
Table 16. Thermal Performance Comparison
Analog Integrated Circuit Device Data
Freescale Semiconductor
Notes
J1
Ρ
Ρ
Ρ
Ρ
This thermal addendum is provided as a supplement to the MC33888 technical
This package is a dual die package. There are two heat sources in the package
For m, n = 1, Rθ
For m = 1, n = 2, Rθ
The stated values are solely for a thermal performance comparison of one package to another in a standardized environment.
θJAmn
θJAmn
θJAmn
θJAmn
1.
2.
3.
4.
5.
and T
Resistance
Thermal
J22,
Per JEDEC JESD51-2 at natural convection, still air
condition.
2s2p thermal test board per JEDEC JESD51-7and
JESD51-5.
Per JEDEC JESD51-8, with the board temperature on the
center trace near the power outputs.
Single layer thermal test board per JEDEC JESD51-3 and
JESD51-5.
Thermal resistance between the die junction and the
exposed pad, “infinite” heat sink attached to exposed pad.
(1),
(1),
(1),
(1),
J2
respectively.
, and a thermal resistance matrix with Rθ
(2)
(2)
(2)
(2)
JA11
1 = Power Chip, 2 = Logic Chip [°C/W]
m = 1,
n = 1
T
T
JA12
6.0
is the thermal resistance from Junction 1 to the reference
19
37
<1
J1
J2
is the thermal resistance from Junction 1 to the
=
1
and P
R
R
θJA11
θJA21
m = 1, n = 2
m = 2, n = 1
2
. This results in two junction temperatures,
5.0
18
36
0
R
R
θJA12
θJA22
.
m = 2,
n = 2
JAmn
6.0
P
P
20
37
1
1
1
2
.
.
2
. This applies to Rθ
Note: Recommended via diameter is 0.5 mm. PTH (plated through
hole) via must be plugged / filled with epoxy or solder mask in order
to minimize void formation and to avoid any solder wicking into the
via.
Figure 14. Surface Mount for Power PQFN
J21
Note For package dimensions, refer to
the 33888 device data sheet.
with Exposed Pads
33888PNB
THERMAL ADDENDUM (REV 2.0)
ADDITIONAL DOCUMENTATION
14 mm x 14 mm
98ARL10544D
36-PIN PQFN
36-PIN PQFN
PNB SUFFIX
0.2
* All measurements
are in millimeters
1.0
0.2
33888
1.0
35