MAX17480GTL+ Maxim Integrated Products, MAX17480GTL+ Datasheet - Page 16

• Manufacturer Part Number: MAX17480GTL+
• Description: IC CTRLR SERIAL VID 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17480GTL+

• Applications: Processor
• Current - Supply: 5mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Output Voltage Range: - 10 V to + 10 V
• Input Voltage Range: 4 V to 26 V
• Input Current: 5 mA
• Power Dissipation: 1778 mW
• Operating Temperature Range: - 40 C to + 105 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AMD 2-/3-Output Mobile Serial
VID Controller
16
______________________________________________________________________________________
PIN
3, 4
5, 6
10
11
12
13
14
1
2
7
8
9
GNDS2
ILIM12
NAME
AGND
V
ILIM3
OUT3
BST3
SVD
SVC
LX3
IN3
DDIO
SMPS1 and SMPS2 Current-Limit Adjust Input. The positive current-limit threshold voltage is 0.052
times the voltage between TIME and ILIM over a 0.2V to 1.0V range of V(TIME, ILIM). The I
minimum current-limit threshold voltage in skip mode is precisely 15% of the corresponding
positive current-limit threshold voltage.
SMPS3 Current-Limit Adjust Input. Two-level current-limit setting for SMPS3. The I
current-limit threshold in skip mode is precisely 25% of the corresponding positive current-limit
threshold.
Internal High-Side MOSFET Drain Connection for SMPS3. Bypass to PGND with a 10µF or greater
ceramic capacitor close to the IC.
Inductor Connection for SMPS3. Connect LX3 to the switched side of the inductor.
Boost Flying Capacitor Connection for SMPS3. An internal switch between V
the flying capacitor during the time the low-side FET is on.
Active-Low Shutdown Control Input. This input cannot withstand the battery voltage. Connect to
V
startup, the output voltage is ramped up to the voltage set by the SVC and SVD inputs at a slew rate
of 1mV/µs. In shutdown, the outputs are discharged using a 20
the core SMPSs and through the OUT3 pin for the northbridge SMPS.
The MAX17480 powers up to the voltage set by the two SVI bits.
The MAX17480 stores the boot VID when PWRGD first goes high. The stored boot VID is cleared
by a rising
Feedback Input for SMPS3. A 20
shut down.
Analog Ground
Serial VID Data
Serial VID Clock
CPU I/O Voltage (1.8V or 1.5V). Logic thresholds for SVD and SVC are relative to the voltage at V
SMPS2 Remote Ground-Sense Input. Normally connected to GND directly at the load. GNDS2
internally connects to a transconductance amplifier that fine tunes the output voltage—
compensating for voltage drops from the SMPS ground to the load ground.
Connect GNDS1 or GNDS2 above 0.9V combined-mode operation (unified core). When GNDS2 is
pulled above 0.9V, GNDS1 is used as the remote ground-sense input.
CC
for normal operation. Connect to ground to put the IC into its 1µA max shutdown state. During
ILIM3
GND
SVC
V
CC
0
0
1
1
signal.
I
LX3PK
SVD
5.25
4.25
discharge FET is enabled from OUT3 to PGND when SMPS3 is
0
1
0
1
(A)
FUNCTION
BOOT VOLTAGE
V
OUT
1.1
1.0
0.9
0.8
(V)
switch through the CSN_ pins for
Pin Description
DD
and BST3 charges
LX3MIN
minimum
MIN12
DDIO
.