MAX17480GTL+ Maxim Integrated Products, MAX17480GTL+ Datasheet - Page 17

• Manufacturer Part Number: MAX17480GTL+
• Description: IC CTRLR SERIAL VID 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17480GTL+

• Applications: Processor
• Current - Supply: 5mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Output Voltage Range: - 10 V to + 10 V
• Input Voltage Range: 4 V to 26 V
• Input Current: 5 mA
• Power Dissipation: 1778 mW
• Operating Temperature Range: - 40 C to + 105 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN
15
16
17
18
19
PGD_IN
FBAC2
FBDC2
NAME
CSN2
CSP2
______________________________________________________________________________________
Output of the Voltage-Positioning Transconductance Amplifier for SMPS2. The RC network between
this pin and the positive side of the remote-sensed output voltage sets the transient AC droop:
where R
trade-off between stability and load-transient response, G
value of the current-sense element that is used to provide the (CSP2, CSN2) current-sense voltage,
Z
Feedback-Sense Input for SMPS2. Connect a resistor R
of the feedback remote sense, and a capacitor from FBAC2 to couple the AC ripple from FBAC2 to
FBDC2. An integrator on FBDC2 corrects for output ripple and ground-sense offset.
To enable a DC load-line less than the AC load-line, add a resistor from FBAC2 to FBDC2.
To enable a DC load-line equal to the AC load-line, short FBAC2 to FBDC2. See the Core Steady-
State Voltage Positioning (DC Droop) section.
FBDC2 is high impedance in shutdown.
Negative Current-Sense Input for SMPS2. Connect to the negative side of the output current-sensing
resistor or the filtering capacitor if the DC resistance of the output inductor is utilized for current
sensing.
A 20
Positive Current-Sense Input for SMPS2. Connect to the positive side of the output current-sensing
resistor or the filtering capacitor if the DC resistance of the output inductor is utilized for current
sensing.
System Power-Good Input
PGD_IN is low when
the boot voltage. The SVI bits can be changed dynamically during this time while PGD_IN remains
low and PWRGD is still low.
PGD_IN goes high after the MAX17480 reaches the boot voltage. This indicates that the SVI block
is active, and the MAX17480 starts to respond to the SVI commands. The MAX17480 stores the
boot VID when PWRGD first goes high. The stored boot VID is cleared by rising
After PGD_IN has gone high, if at any time PGD_IN goes low, the MAX17480 regulates to the
previously stored boot VID. The slew rate during this transition is set by the resistor between the
TIME and GND pins. PWRGD follows the blanking for normal VID transition.
The subsequent rising edge of PGD_IN does not change the stored VID.
CFB2
is the impedance of C
discharge FET is enabled from CSN2 to PGND when the SMPS2 is shut down.
DROOP_AC2
R
DROOP AC
AMD 2-/3-Output Mobile Serial
_
is the transient (AC) voltage-positioning slope that provides an acceptable
2
=
first goes high. The MAX17480 decodes the two SVI bits to determine
FB2
R
FBAC
, and FBAC2 is high impedance in shutdown.
2
R
+
FBAC
R
FBDC
FUNCTION
2
×
2
R
+
FBDC
Pin Description (continued)
R
FB
2
FBDC2
2
m(FBAC2)
Z Z
CFB
between FBDC2 and the positive side
VID Controller
2
×
= 2mS (typ), and R
R
SENSE
2
×
G
m FBAC
(
SENSE2
.
2
)
is the
17