LM96194CISQ/NOPB National Semiconductor, LM96194CISQ/NOPB Datasheet - Page 43
LM96194CISQ/NOPB
Manufacturer Part Number
LM96194CISQ/NOPB
Description
IC TRUTHERM HDWR MONITOR 48-LLP
Manufacturer
National Semiconductor
Series
PowerWise®, TruTherm®r
Datasheet
1.LM96194CISQNOPB.pdf
(106 pages)
Specifications of LM96194CISQ/NOPB
Function
Fan Control, Temp Monitor
Topology
ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 85°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM96194CISQTR
Register
Address
Register
Address
Register
Address
Register
Address
Register
Address
Register
Address
Register
Address
Register 17h is a mirror of register Zone 2b (MMBT3904) Temp at address 07h.
16.6.2 Registers 18h – 1Fh Zone 1 (CPU) and Zone 2 (MMBT3904) Extended Resolution Filtered Value Registers, Most and
Least Significant Bytes
Register 19h is a mirror of register Zone 1a (CPU) Filtered Temp at address 54h.
Register 1Bh is a mirror of register Zone 1b (CPU) Filtered Temp at address 08h.
Register 1Dh is a mirror of register Zone 2a (MMBT3904) Filtered Temp at address 55h.
Register 1Fh is a mirror of register Zone 2b (MMBT3904) Filtered Temp at address 09h.
16.6.3 Registers 20h – 23h Zone 3 and Zone 4 Extended Resolution Value Registers, Most and Least Significant Bytes
Register 21h is a mirror of register Zone 3 (Internal) Temp at address 52h.
Register 23h is a mirror of register Zone 4 (External Digital) Temp at address 53h.
1Ch
1Dh
1Ah
1Bh
1Eh
1Fh
16h
17h
18h
19h
20h
21h
22h
23h
Read/
Read/
Read/
Read/
Read/
Read/
Read/
Write
Write
Write
Write
Write
Write
Write
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
Z1a_F_MSB
Z1b_F_MSB
Z2a_F_MSB
Z2b_F_MSB
Z1a_F_LSB
Z1b_F_LSB
Z2a_F_LSB
Z2b_F_LSB
Z2b_MSB
Z2b_LSB
Register
Register
Register
Register
Register
Register
Register
Z3_MSB
Z4_MSB
Z3_LSB
Z4_LSB
Name
Name
Name
Name
Name
Name
Name
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Sign
Sign
Sign
Sign
Sign
Sign
Sign
0.5
0.5
0.5
0.5
0.5
0.5
0.5
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
0.25
0.25
0.25
0.25
64
64
64
64
64
64
64
0
0
0
0.125
0.125
0.125
0.125
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
32
32
32
32
32
32
32
0
0
0
43
0.0625
0.0625
0.0625
0.0625
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
16
16
16
16
16
16
16
0
0
0
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
0
8
0
8
0
8
0
8
0
8
0
8
0
8
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
0
4
0
4
0
4
0
4
0
4
0
4
0
4
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
0
2
0
2
0
2
0
2
0
2
0
2
0
2
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
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Default
Default
Default
Default
Default
Default
Default
Value
Value
Value
Value
Value
Value
Value
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h