LM96194CISQ/NOPB National Semiconductor, LM96194CISQ/NOPB Datasheet - Page 50

• Manufacturer Part Number: LM96194CISQ/NOPB
• Description: IC TRUTHERM HDWR MONITOR 48-LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®, TruTherm®r

Specifications of LM96194CISQ/NOPB

• Function: Fan Control, Temp Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 85°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM96194CISQTR

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Bit
3:5
Bit
1:3
Register
Address
16.9.2 Register 41h B_Error Status 2
Register
Address
16.9.3 Register 42h B_Error Status 3
0
1
2
6
7
0
4
5
6
7
42h
41h
AD1_ERR
AD2_ERR
AD3_ERR
RES
AD4_ERR
RES
AD5_ERR
RES
AD6_ERR
AD7_ERR
AD8_ERR
AD9_ERR
Name
Name
Read/
Write
Read/
RWC
Write
RWC
Register
Status 3
RWC This bit is set when the AD_IN1 voltage has fallen outside the range defined by
RWC This bit is set when the AD_IN2 voltage has fallen outside the range defined by
RWC This bit is set when the AD_IN3 voltage has fallen outside the range defined by
RWC RESERVED
RWC This bit is set when the AD_IN7 voltage has fallen outside the range defined by
RWC RESERVED
RWC This bit is set when the AD_IN9 voltage has fallen outside the range defined by
RWC RESERVED
RWC This bit is set when the AD_IN13 voltage has fallen outside the range defined by
RWC This bit is set when the AD_IN14 voltage has fallen outside the range defined by
RWC This bit is set when the AD_IN15 voltage has fallen outside the range defined by
RWC This bit is set when the AD_IN16 voltage has fallen outside the range defined by
Register
B_Error
Status 2
R/W
R/W
B_Error
Name
Name
the AD_IN1 Low Limit and the AD_IN1 High Limit registers.
the AD_IN2 Low Limit and the AD_IN2 High Limit registers.
the AD_IN3 Low Limit and the AD_IN3 High Limit registers.
the AD_IN7 Low Limit and the AD_IN7 High Limit registers.
the AD_IN9 Low Limit and the AD_IN9 High Limit registers.
the AD_IN13 Low Limit and the AD_IN13 High Limit registers.
the AD_IN14 Low Limit and the AD_IN14 High Limit registers.
the AD_IN15 Low Limit and the AD_IN15 High Limit registers.
the AD_IN16 Low Limit and the AD_IN16 High Limit registers.
ADIN9
_ERR
Bit 7
RES
Bit 7
ADIN4
_ERR
Bit 6
ADIN8
_ERR
Bit 6
Bit 5
RES
ADIN7
_ERR
Bit 5
50
Description
Description
Bit 4
RES
ADIN6
_ERR
Bit 4
Bit 3
RES
Bit 3
RES
ADIN3
_ERR
Bit 2
Bit 2
RES
ADIN2
_ERR
Bit 1
Bit 1
RES
ADIN1
_ERR
ADIN5
_ERR
Bit 0
Bit 0
S3*, S4/5*
S3*, S4/5*
Masking
Masking
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
Sleep
Sleep
none
Default
Default
Value
Value
00h
00h