ISL8101IRZ Intersil, ISL8101IRZ Datasheet - Page 8
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ISL8101IRZ
Manufacturer Part Number
ISL8101IRZ
Description
IC PWM CTRLR BUCK 2PHASE 24-QFN
Manufacturer
Intersil
Datasheet
1.ISL8101CRZ-T.pdf
(20 pages)
Specifications of ISL8101IRZ
Applications
Controller, Intel VRM9, VRM10, and AMD Hammer Applications
Voltage - Input
4.6 ~ 12 V
Number Of Outputs
1
Voltage - Output
0.6 ~ 2.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
INTERLEAVING
The switching of each channel in a ISL8101-based converter
is timed to be symmetrically out of phase with the other
channel. As a result, the two-phase converter has a
combined ripple frequency twice the frequency of one of its
phases. In addition, the peak-to-peak amplitude of the
combined inductor currents is proportionately reduced.
Increased ripple frequency and lower ripple amplitude
generally translate to lower per-channel inductance and
lower total output capacitance for a given set of performance
specifications.
Figure 2 illustrates the additive effect on output ripple
frequency. The two channel currents (I
to form the AC ripple current and the DC load current. The
ripple component has two times the ripple frequency of each
individual channel current.
To understand the reduction of ripple current amplitude in the
multiphase circuit, examine Equation 4 representing an
individual channel’s peak-to-peak inductor current.
V
respectively, L is the single-channel inductor value, and f
the switching frequency.
The output capacitors conduct the ripple component of the
inductor current. In the case of multiphase converters, the
capacitor current is the sum of the ripple currents from each
of the individual channels (see Equation 5).
Peak-to-peak ripple current, I
proportional to the number of channels. Output-voltage
I
I
P-P
L P-P
IN
,
FIGURE 2. PWM AND INDUCTOR-CURRENT WAVEFORMS
and V
=
(
------------------------------------------------------------------- -
=
V
IN
(
--------------------------------------------------------- -
V
OUT
–
IN
N V
L f
–
FOR 2-PHASE CONVERTER
L f
⋅
⋅
V
are the input and output voltages,
⋅
I
L1
OUT
S
S
OUT
⋅
⋅
V
V
) V
IN
) V
IN
⋅
PWM2
⋅
I
L2
OUT
OUT
P-P
8
, decreases by an amount
PWM1
L1
I
L1
and I
+ I
L2
L2
), combine
(EQ. 4)
(EQ. 5)
S
is
ISL8101
ISL8101
ripple is a function of capacitance, capacitor equivalent
series resistance (ESR), and inductor ripple current.
Reducing the inductor ripple current allows the designer to
use fewer or less costly output capacitors (should output
ripple be an important design parameter).
Another benefit of interleaving is the reduction of input ripple
current. Input capacitance is determined in a large part by
the maximum input ripple current. Multiphase topologies can
improve overall system cost and size by lowering input ripple
current and allowing the designer to reduce the cost of input
capacitance. The example in Figure 3 illustrates input
currents from a two-phase converter combining to reduce
the total input ripple current.
Figure 12, part of the section entitled “Input Capacitor
Selection” on page 19, can be used to determine the
input-capacitor RMS current based on load current and duty
cycle. The figure is provided as an aid in determining the
optimal input capacitor solution.
PWM OPERATION
One switching cycle for the ISL8101 is defined as the time
between consecutive PWM pulse terminations (turn-off of
the upper MOSFET on a channel). Each cycle begins when
a switching clock signal commands the upper MOSFET to
go off. The other channel’s upper MOSFET conduction is
terminated 1/2 of a cycle later.
Once a channel’s upper MOSFET is turned off, the lower
MOSFET remains on for a minimum of 1/3 cycle. This forced
off time is required to assure an accurate current sample.
Following the 1/3-cycle forced off time, the controller enables
the upper MOSFET output. Once enabled, the upper
MOSFET output transitions high when the sawtooth signal
crosses the adjusted error-amplifier output signal, as
illustrated in the ISL8101’s block diagram. Just prior to the
upper drive turning the MOSFET on, the lower MOSFET
FIGURE 3. INPUT CAPACITOR CURRENT AND INDIVIDUAL
C
CHANNEL CURRENTS IN A 2-PHASE
CONVERTER
IN
CURRENT
Q1 D-S CURRENT
Q3 D-S CURRENT
July 28, 2008
FN9223.1