KS8995MA Micrel Inc, KS8995MA Datasheet - Page 55

• Manufacturer Part Number: KS8995MA
• Description: IC SWITCH 10/100 5PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KS8995MA

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1017 - BOARD EVAL EXPERIMENT KS8995M
• Lead Free Status / RoHS Status: Not Compliant, Lead free / RoHS Compliant

Semptember 2008
Register 31 (0x1F): Port 1 Control 14
Register 47 (0x2F): Port 2 Control 14
Register 63 (0x3F): Port 3 Control 14
Register 79 (0x4F): Port 4 Control 14
Register 95 (0x5F): Port 5 Control 14
Advanced Control Registers
The IPv4 TOS priority control registers implement a fully decoded 64 bit differentiated services code point (DSCP)
register used to determine priority from the 6 bit TOS field in the IP header. The most significant 6 bits of the TOS
field are fully decoded into 64 possibilities, and the singular code that results is compared against the corresponding
bit in the DSCP register. If the register bit is a 1, the priority is high; if it is a 0, the priority is low.
Address
2
1
0
Address
7
6
5
4
3
2-1
0
Address
Register 96 (0x60): TOS Priority Control Register 0
7-0
Register 97 (0x61): TOS Priority Control Register 1
7-0
Register 98 (0x62): TOS Priority Control Register 2
7-0
Register 99 (0x63): TOS Priority Control Register 3
7-0
Register 100 (0x64): TOS Priority Control Register 4
7-0
Name
Partner 100BT Half-
Duplex Capability
Partner 10BT Full-Duplex
Capability
Partner 10BT Half-Duplex
Capability
Name
PHY Loopback
Remote Loopback
PHY Isolate
Soft Reset
Force Link
Reserved
far End fault
Name
DSCP[55:48]
DSCP[47:40]
DSCP[39:32]
DSCP[31:24]
DSCP[63:56]
Description
Description
1, link partner 100BT half-duplex capable.
0, link partner not 100BT half-duplex capable.
1, link partner 10BT full-duplex capable.
0, link partner not 10BT full-duplex capable.
1, link partner 10BT half-duplex capable.
0, link partner not 10BT half-duplex capable.
Description
1, perform PHY loopback, i.e. loopback MAC’s Tx back
to Rx.
0, normal operation.
1, perform remote loopback, i.e. loopback PHY’s Rx
back to Tx.
0, normal operation.
1, electrical isolation of PHY from MII and TX+/TX-.
0, normal operation.
1, PHY soft reset.
0, normal operation.
1, force link in the PHY.
0, normal operation.
N/A
1, far end fault status detected.
0, no far end fault status detected.
55
Mode
Mode
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
M9999-091508
00000000
00000000
00000000
00000000
00000000
Default
Default
Default
0
0
0
0
0
0
0
0
0
0