MT8VDDT6432UY-5K1 Micron Technology Inc, MT8VDDT6432UY-5K1 Datasheet - Page 26

• Manufacturer Part Number: MT8VDDT6432UY-5K1
• Description: MODULE DDR 256MB 100-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT8VDDT6432UY-5K1

• Memory Type: DDR SDRAM
• Memory Size: 256MB
• Speed: 400MT/s
• Package / Case: 100-DIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 8:
pdf: 09005aef80745603, source: 09005aef807455eb
DD8C32_64_128x32UG_2.fm - Rev. G 5/05 EN
Pull-Down Characteristics
34. The voltage levels used are derived from a minimum V
35. V
36. V
37.
38. During initialzation, V
39. During initialization, V
40. The current Micron part operates below the slowest JEDEC operating frequency of 83
load. In practice, the voltage levels obtained from a properly terminated bus will pro-
vide significantly different voltage values.
can not be greater than 1/3 of the cycle rate. V
pulse width ≤ 3ns and the pulse width can not be greater than 1/3 of the cycle rate.
t
prevail over
Alternatively, V
0.0V, provided a minimum of 42Ω of series resistance is used between the V
and the input pin.
Alternatively, V
volts, provided a minimum of 42 ohms of series resistance is used between the V
supply and the input pin.
MHz. As such, future die may not reflect this option.
HZ (MAX) will prevail over
e. The full variation in the ratio of the maximum to minimum pull-up and pull-
f. The full variation in the ratio of the nominal pull-up to pull-down current should
IH
DD
and V
overshoot: V
down current should be between 0.71 and 1.4, for device drain-to-source volt-
ages from 0.1V to 1.0V, and at the same voltage and temperature.
be unity ±10 percent, for device drain-to-source voltages from 0.1V to 1.0V.
DD
t
DQSCK (MIN) +
Q must track each other.
128MB, 256MB, 512MB: (x32, DR) 100-Pin DDR UDIMM
TT
TT
IH
may be 1.35V maximum during power up, even if V
may be 1.35V maximum during power up, even if V
(MAX) = V
DD
DD
Q, V
, V
26
t
DQSCK (MAX) +
TT
t
RPRE (MAX) condition.
TT
DD
, and V
, and V
+ 1.5V for a pulse width ≤ 3ns and the pulse width
Micron Technology, Inc., reserves the right to change products or specifications without notice.
REF
REF
must be equal to or less than V
must be equal to or less than V
t
RPST (MAX) condition.
IL
undershoot: V
DD
©2004, 2005 Micron Technology, Inc. All rights reserved.
level and the referenced test
IL
(MIN) = -1.5V for a
t
LZ (MIN) will
DD
DD
/V
/
DD
DD
TT
V
DD
DD
Notes
supply
+ 0.3V.
+ 0.3V.
Q are
are 0
TT