20-101-0303 Rabbit Semiconductor, 20-101-0303 Datasheet - Page 46

• Manufacturer Part Number: 20-101-0303
• Description: SMARTSCREEN OP7100 W/TOUCHSCREEN
• Manufacturer: Rabbit Semiconductor

Specifications of 20-101-0303

• Display Type: STN - Super-Twisted Nematic
• Viewing Area: 121.00mm L x 91.00mm W
• Backlight: CCFL - White
• Dot Pitch: 0.36mm x 0.36mm
• Dot Pixels: 320 x 240 (QVGA)
• Interface: Serial
• Product: Prototyping Accessories
• Processor Type: Z180
• Sram: 128 KB
• Flash: 512 KB
• Number Of I/os: 16
• Backup Battery: 3 V Lithium Coin Type
• Operating Voltage: 10 V to 30 V
• Power Consumption: 4.5 W
• Interface Type: Ethernet
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Display Mode: -
• Dot Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 20-101-0303; 20-101-303; 20-101-303; 316-1175

CTS1E (CTS Enable, Channel 1)
The signals RXS and CTS1 are multiplexed on the same pin. A 1 stored in
this bit makes the pin serve the CTS1 function. A 0 selects the RXS
function. (The pin RXS is the CSI/O data receive pin.) When RXS is
selected, the CTS line has no effect.
RIE (Receiver Interrupt Enable)
A 1 enables receiver interrupts and 0 disables them. A receiver interrupt is
requested under any of the following conditions:
(Channel 0 only),
/DCD0
RDRF (read data register full), OVRN (overrun), PE (parity error), and FE
(framing error). The condition causing the interrupt must be removed be-
fore the interrupts are re-enabled, or another interrupt will occur. Reading
the receiver data register (RDR) clears the RDRF flag. The EFR bit in
CNTLA is used to clear the other error flags.
FE (Framing Error)
A stop bit was missing, indicating scrambled data. This bit is cleared by the
EFR bit in CNTLA.
PE (Parity Error)
Parity is tested only if MOD1 in CNTLA is set. This bit is cleared by the
EFR bit in CNTLA.
OVRN (Overrun Error)
Overrun occurs when bytes arrive faster than they can be read from the
receiver data register. The receiver shift register (RSR) and receiver data
register (RDR) are both full. This bit is cleared by the EFR bit in CNTLA.
RDRF (Receiver Data Register Full)
This bit is set when data is transferred from the receiver shift register to the
receiver data register. It is set even when one of the error flags is set, in
which case defective data is still loaded to RDR. The bit is cleared when
the receiver data register is read, when the
input pin is high, and by
/DCD0
RESET and IOSTOP.
46 Hardware
OP7100