TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 13
TMP86C909XB
Manufacturer Part Number
TMP86C909XB
Description
EMULATION CHIP FOR TMP86F SDIP
Manufacturer
Toshiba
Datasheet
1.TMP86C909XB.pdf
(201 pages)
Specifications of TMP86C909XB
Accessory Type
Adapter
For Use With/related Products
TMP86F SDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1.1 Features
9. 8bit Serial Expansion Interface (SEI): 1 channel
10. 10-bit successive approximation type AD converter
11. Key-on wakeup : 4 channels
12. Clock operation
13. Low power consumption operation
14. Wide operation voltage:
stop.)
oscillate.)
quency clock. Release by falling edge of the source clock which is set by TBTCR<TBTCK>.
puts(CPU restarts).
ruputs. (CPU restarts).
quency clock.Release by falling edge of the source clock which is set by TBTCR<TBTCK>.
put.(CPU restarts).
interruput.
- Analog input: 6 ch
(MSB/LSB selectable and max. 4Mbps at 16MHz)
Single clock mode
Dual clock mode
STOP mode: Oscillation stops. (Battery/Capacitor back-up.)
SLOW1 mode: Low power consumption operation using low-frequency clock.(High-frequency clock
SLOW2 mode: Low power consumption operation using low-frequency clock.(High-frequency clock
IDLE0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using high fre-
IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interru-
IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by inter-
SLEEP0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using low fre-
SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interru-
SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock.
4.5 V to 5.5 V at 16MHz /32.768 kHz
2.7 V to 5.5 V at 8 MHz /32.768 kHz
Page 2
TMP86F409NG
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