TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 131
TMP86C909XB
Manufacturer Part Number
TMP86C909XB
Description
EMULATION CHIP FOR TMP86F SDIP
Manufacturer
Toshiba
Datasheet
1.TMP86C909XB.pdf
(201 pages)
Specifications of TMP86C909XB
Accessory Type
Adapter
For Use With/related Products
TMP86F SDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11.6 Functional Description
11.6 Functional Description
from its MISO pin to the master device’s MISO pin. This means that data are exchanged between master and slave
via full-duplex communication, with data output and input operations synchronized by the same clock signal. After
end of transfer, the transmit byte in 8 bit shift register is replaced with the receive byte.
Figure 11-4 shows how the SEI master and slave are connected.
When the master device sends data from its MOSI pin to a slave device’s MOSI pin, the slave device returns data
SEI clock
8-bit shift register
Master
Figure 11-4 Master and Slave Connection in SEI
MOSI
MISO
SCLK
SS
5 V
Page 120
0V
MOSI
MISO
SCLK
SS
8-bit shift register
Slave
TMP86F409NG
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