TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 70

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TMP86C909XB

Manufacturer Part Number
TMP86C909XB
Description
EMULATION CHIP FOR TMP86F SDIP
Manufacturer
Toshiba
Datasheet

Specifications of TMP86C909XB

Accessory Type
Adapter
For Use With/related Products
TMP86F SDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7. Watchdog Timer (WDT)
7.1 Watchdog Timer Configuration
rious noises or the deadlock conditions, and return the CPU to a system recovery routine.
rupt request”. Upon the reset release, this signal is initialized to “reset request”.
rupt.
Internal reset
The watchdog timer is a fail-safe system to detect rapidly the CPU malfunctions such as endless loops due to spu-
The watchdog timer signal for detecting malfunctions can be programmed only once as “reset request” or “inter-
When the watchdog timer is not used to detect malfunctions, it can be used as the timer to provide a periodic inter-
Note: Care must be taken in system design since the watchdog timer functions are not be operated completely due to
fc/2
fc/2
fc/2
fc/2
23
21
19
17
or fs/2
or fs/2
or fs/2
effect of disturbing noise.
or fs/2
15
13
11
9
WDTT
2
0034
WDTEN
Watchdog timer control registers
H
WDTCR1
Figure 7-1 Watchdog Timer Configuration
Clock
Clear
S R
Q
Binary counters
Writing
disable code
1
Controller
0035
2
H
WDTCR2
Overflow
Page 59
Writing
clear code
WDT output
WDTOUT
Reset release
Interrupt request
R
S
Q
TMP86F409NG
Reset
request
INTWDT
interrupt
request

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