DC-VIDEO-TVP5146N Altera, DC-VIDEO-TVP5146N Datasheet - Page 14

VIDEO DAUGHTER CARD

DC-VIDEO-TVP5146N

Manufacturer Part Number
DC-VIDEO-TVP5146N
Description
VIDEO DAUGHTER CARD
Manufacturer
Altera
Series
Stratix® IIIr

Specifications of DC-VIDEO-TVP5146N

Main Purpose
Video, Daughter Card
Embedded
No
Utilized Ic / Part
Altera Dev Kits
Primary Attributes
Dual Composite Video Input - NTSC or PAL
Secondary Attributes
10-bit BT.656 Output, Compatible with Expansion Connector, Standard on Most Altera Development Kits
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1704
Table 1–20. PLL Specifications for Stratix III Devices (Part 1 of 3)
f
f
f
t
f
f
t
t
t
t
f
t
t
IN
INPFD
VCO
EINDUTY
OUT
OUT_EXT
OUTDUTY
FCOMP
CONFIGPLL
CONFIGPHASE
SCANCLK
LOCK
DLOCK
Symbol
Input clock frequency
Input frequency to the PFD
PLL VCO operating range
Input clock or external feedback
clock input duty cycle
Output frequency for internal global
or regional clock
Output frequency for dedicated
external clock output
Duty cycle for external clock output
(when set to 50%)
External feedback clock
compensation time
Time required to reconfigure scan
chain
Time required to reconfigure phase
shift
scanclk frequency
Time required to lock from end of
device configuration
Time required to lock dynamically
(after switchover or reconfiguring
any non-post-scale
counters/delays)
Parameter
Min
600
40
45
5
5
V
CCL
Typ
= 1.1 V
3.5
C2
50
1
1600
Max
800
325
600
800
100
(1)
(2)
(2)
60
55
10
1
1
Min
600
40
45
5
5
V
CCL
C3, I3
Typ
3.5
= 1.1 V
50
1
1300
Max
717
325
500
717
100
(1)
(2)
(2)
60
55
10
1
1
Min
600
40
45
5
5
V
CCL
C4, I4
Typ
= 1.1 V
3.5
50
1
1300
Max
717
325
450
717
100
(1)
(2)
(2)
60
55
10
1
1
Min
600
40
45
5
5
V
CCL
Typ
3.5
= 1.1 V
50
1
1300
Max
717
325
450
717
100
(1)
(2)
(2)
60
55
10
C4L, I4L
1
1
Min
600
40
45
5
5
V
CCL
Typ
= 0.9 V
3.5
50
1
1300
Max
717
325
375
717
100
(1)
60
(2)
(2)
55
10
1
1
scanclk
scanclk
cycles
cycles
Unit
MHz
MHz
MHz
MHz
MHz
MHz
ms
ms
ns
%
%

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