DAC1405D750/DB,598 NXP Semiconductors, DAC1405D750/DB,598 Datasheet - Page 16

• Manufacturer Part Number: DAC1405D750/DB,598
• Description: BOARD DEMO FOR DAC1405D750
• Manufacturer: NXP Semiconductors
• Type: D/Ar

Specifications of DAC1405D750/DB,598

• Number Of Dac's: 2
• Number Of Bits: 14
• Outputs And Type: 2, Differential
• Sampling Rate (per Second): 750M
• Data Interface: Serial, SPI™
• Settling Time: 20ns
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: DAC1405D750
• Product: Data Conversion Development Tools
• Conversion Rate: 750 MSPS
• Resolution: 14 bit
• Interface Type: SMA
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 1.8 V
• For Use With/related Products: DAC1405D750
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5090

Table 9.
Address
Dec Hex
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
26
27
28
29
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah DAC_A_Cfg_2
0Bh DAC_A_Cfg_3
0Ch DAC_B_Cfg_1
0Dh DAC_B_Cfg_2
0Eh DAC_B_Cfg_3
0Fh DAC_Cfg
10h
1Ah DAC_A_Aux_MSB R/W
1Bh DAC_A_Aux_LSB R/W AUX_A_PD
1Ch DAC_B_Aux_MSB R/W
1Dh DAC_B_Aux_LSB R/W AUX_B_PD
Register allocation map
Register name
COMMon
TXCFG
PLLCFG
FREQNCO_LSB
FREQNCO_LISB
FREQNCO_UISB
FREQNCO_MSB
PHINCO_LSB
PHINCO_MSB
DAC_A_Cfg_1
SYNC_Cfg
R/W Bit definition
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W DAC_A_PD
R/W
R/W
R/W DAC_B_PD
R/W
R/W
R/W
R/W SYNC_DIV
NCO_ON
3W_SPI
PLL_PD
Bit 7
DAC_A_GAIN_
DAC_A_GAIN_
DAC_B_GAIN_
DAC_B_GAIN_
COARSE[1:0]
COARSE[3:2]
COARSE[1:0]
COARSE[3:2]
SYNC_SEL
NCO_LP_
SPI_RST
DAC_A_
DAC_B_
SLEEP
SLEEP
Bit 6
SEL
-
INV_SIN_
PLL_DIV_
CLK_SEL
Bit 5
SEL
PD
-
FREQ_NCO[23:16]
FREQ_NCO[31:24]
FREQ_NCO[15:8]
FREQ_NCO[7:0]
Bit 4
PH_NCO[15:8]
PH_NCO[7:0]
-
-
-
AUX_A[9:2]
AUX_B[9:2]
PLL_DIV[1:0]
MODULATION[2:0]
MODE_
DAC_A_GAIN_FINE[5:0]
DAC_B_GAIN_FINE[5:0]
Bit 3
SEL
DAC_A_OFFSET[11:6]
DAC_B_OFFSET[11:6]
DAC_A_OFFSET[5:0]
DAC_B_OFFSET[5:0]
DAC_CLK_DELAY[1:0]
CODING
-
Bit 2
INTERPOLATION[1:0]
MINUS_
IC_PD
Bit 1
3DB
AUX_A[1:0]
AUX_B[1:0]
DAC_CLK
GAP_PD
NOISE_
SHPER
_POL
Bit 0
Default
Bin
10000000
10000111
00010000
01100110
01100110
01100110
00100110
00000000
00000000
00000000
01000000
11000000
00000000
01000000
11000000
00000000
00000000
10000000
00000000
10000000
00000000
135 87
102 66
102 66
102 66
38
0
0
64
64
0
128 80
0
128 80
0
Dec Hex
128 80
16
0
192 C0
0
192 C0
0
10
26
00
00
00
40
00
40
00
00
00
00