DK-MAXII-1270N Altera, DK-MAXII-1270N Datasheet - Page 22

• Manufacturer Part Number: DK-MAXII-1270N
• Description: KIT DEV MAXII W/EPM 1270N
• Manufacturer: Altera
• Series: MAX® IIr
• Type: CPLDr

Specifications of DK-MAXII-1270N

• Contents: Dev Board, Quartus®II Web Edition, Nios®II Web Edition, Cables, Accessories, Reference Designs and Demos
• Silicon Manufacturer: Altera
• Core Architecture: CPLD
• Core Sub-architecture: MAX
• Silicon Core Number: EPM
• Silicon Family Name: MAX II
• Rohs Compliant: Yes
• For Use With/related Products: MAX®II CPLDs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2380

MAX II Development Board
22
Preliminary
Altera Expansion Prototype Header
The Altera expansion prototype header consists of three 0.1-inch headers:
one 40-pin connector (J4), one 14-pin connector (J3), and one 20-pin
connector (J5). These pins are arranged as shown in
difference between a male and a female connector is the sex of the 0.1-inch
headers.
In
routed to the MAX II device. The SC_CLK2 pin is routed to GCLK1, one of
two global clocks, in the MAX II device.
PCI_PAR
PCI_PERRN
PCI_REQN
PCI_RSTN
PCI_SERRN
PCI_STOPN
PCI_TRDYN
PCI_AD[31]
PCI_AD[4]
PCI_AD[5]
PCI_AD[6]
PCI_AD[7]
PCI_AD[8]
Table 25. PCI Edge Connector Pin-Outs (Part 3 of 3)
Figure
5, NC signifies no connection. SC_40 to SC_0 are user I/O pins
Signal Name
MAX II Pin
Figure
G15
H13
G16
H14
H16
N15
D15
D16
P14
E12
E13
E16
J12
Altera Corporation
5. The only