DK-MAXII-1270N Altera, DK-MAXII-1270N Datasheet - Page 25

KIT DEV MAXII W/EPM 1270N

DK-MAXII-1270N

Manufacturer Part Number
DK-MAXII-1270N
Description
KIT DEV MAXII W/EPM 1270N
Manufacturer
Altera
Series
MAX® IIr
Type
CPLDr
Datasheets

Specifications of DK-MAXII-1270N

Contents
Dev Board, Quartus®II Web Edition, Nios®II Web Edition, Cables, Accessories, Reference Designs and Demos
Silicon Manufacturer
Altera
Core Architecture
CPLD
Core Sub-architecture
MAX
Silicon Core Number
EPM
Silicon Family Name
MAX II
Rohs Compliant
Yes
For Use With/related Products
MAX®II CPLDs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2380

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-MAXII-1270N
Manufacturer:
ALTERA
0
Schmitt Trigger
Circuit
Active I/O Test
Points
Prototype
Section
Altera Corporation
f
The MAX II development board has an R-C circuit to allow designers to
investigate the internal Schmitt trigger on MAX II I/O pins.
shows the circuit.
Figure 6. R-C Circuit
The MAX II development board provides four test points to allow the
designer to analyze the timing of the MAX II device power-up and
configuration.
For more information on using the test points to analyze the MAX II
device power up and configuration, see the MAX II Development Kit
Getting Started User Guide.
Table 27
A prototype area consisting of an array of 120 0.1-inch holes is provided.
This area can be used to add custom components to the MAX II
development board. Connections to both the 3.3 V plane and ground
plane of the MAX II board are included. The silk-screen text on the board
indicates which holes are connected to which planes. All of the other
holes are not connected to anything on the board.
V_int
V_io
GND
Active IO
Table 27. Signals Used as Test Points
ID
shows the pin-outs for the signals in this circuit.
3.3 or 2.5 V
3.3 V
GND
MAX II pin
P12
RC CLK_CTRL
Signal
Pin N11
+3.3-V/2.5-V power for the MAX II internal logic
3.3-V supply for MAX II V
Ground plane of MAX II development board
MAX II user I/O pin
R13
RC CLK
Pin P11
Description
C8
C C I O
Schmitt Trigger Circuit
Figure 6
Preliminary
25

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