C8051F800DK Silicon Laboratories Inc, C8051F800DK Datasheet - Page 160
![KIT DEV C8051F800](/photos/28/94/289400/mcudevkit_sml.jpg)
C8051F800DK
Manufacturer Part Number
C8051F800DK
Description
KIT DEV C8051F800
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F800DK
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F800
Data Bus Width
16 bit
Interface Type
USB
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F8xx
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
336-1797
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C8051F80x-83x
24.1. 16-bit CRC Algorithm
The C8051F80x-83x CRC unit calculates the 16-bit CRC MSB-first, using a poly of 0x1021. The following
describes the 16-bit CRC algorithm performed by the hardware:
1. XOR the most-significant byte of the current CRC result with the input byte. If this is the first iteration of
2. If the MSB of the CRC result is set, left-shift the CRC result, and then XOR the CRC result with the
3. If the MSB of the CRC result is not set, left-shift the CRC result.
4. Repeat at Step 2 for the number of input bits (8).
For example, the 16-bit C8051F80x-83x CRC algorithm can be described by the following code:
unsigned short UpdateCRC (unsigned short CRC_acc, unsigned char CRC_input){
}
Table 24.1 lists example input values and the associated outputs using the 16-bit C8051F80x-83x CRC
algorithm (an initial value of 0xFFFF is used):
160
the CRC unit, the current CRC result will be the set initial value (0x0000 or 0xFFFF).
polynomial (0x1021).
unsigned char i;
#define POLY 0x1021
// Create the CRC "dividend" for polynomial arithmetic (binary arithmetic
// with no carries)
CRC_acc = CRC_acc ^ (CRC_input << 8);
// "Divide" the poly into the dividend using CRC XOR subtraction
// CRC_acc holds the "remainder" of each divide
// Only complete this division for 8 bits since input is 1 byte
for (i = 0; i < 8; i++)
{
}
return CRC_acc; // Return the final remainder (CRC value)
// Check if the MSB is set (if MSB is 1, then the POLY can "divide"
// into the "dividend")
if ((CRC_acc & 0x8000) == 0x8000)
{
}
else
{
}
// if so, shift the CRC value, and XOR "subtract" the poly
CRC_acc = CRC_acc << 1;
CRC_acc ^= POLY;
// if not, just shift the CRC value
CRC_acc = CRC_acc << 1;
0x00, 0x00, 0xAA, 0xBB, 0xCC
0xAA, 0xBB, 0xCC
Table 24.1. Example 16-bit CRC Outputs
Input
0x63
// loop counter
Rev. 1.0
0xBD35
0x6CF6
0xB166
Output
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