C8051F800DK Silicon Laboratories Inc, C8051F800DK Datasheet - Page 97

• Manufacturer Part Number: C8051F800DK
• Description: KIT DEV C8051F800
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F800DK

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: C8051F800
• Data Bus Width: 16 bit
• Interface Type: USB
• Operating Supply Voltage: 7 V to 15 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F8xx
• Lead Free Status / Rohs Status: Supplier Unconfirmed
• Other names: 336-1797

17. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the C8051F80x-83x's resources and peripher-
als. The CIP-51 controller core duplicates the SFRs found in a typical 8051 implementation as well as
implementing additional SFRs used to configure and access the sub-systems unique to the C8051F80x-
83x. This allows the addition of new functionality while retaining compatibility with the MCS-51™ instruc-
tion set. Table 17.1 lists the SFRs implemented in the C8051F80x-83x device family.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g., P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the data sheet, as indicated in
Table 17.2, for a detailed description of each register.
Note: SFR Addresses ending in 0x0 or 0x8 are bit-addressable locations, and can be used with bitwise instructions.
F8 SPI0CN
F0
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2
E0
D8 PCA0CN
D0
C8 TMR2CN REG0CN
C0 SMB0CN SMB0CF
B8
B0 CS0CN
A8
A0
98 SCON0
90
88
80
TCON
PSW
ACC
0(8)
P2
P1
P0
IP
IE
B
OSCXCN
SPI0CFG
PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2
REF0CN CRC0AUTO CRC0CNT
CLKSEL
P0MDIN
CS0SS
SBUF0
PCA0L
TMOD
XBR0
Table 17.1. Special Function Register (SFR) Memory Map
1(9)
SP
SMB0DAT
TMR2RLL
SPI0CKR
OSCICN
P1MDIN
PCA0H
CS0SE
XBR1
DPL
2(A)
TL0
PCA0CPL0 PCA0CPH0
TMR2RLH
ADC0GTL ADC0GTH
ADC0MX
SPI0DAT
CPT0CN
OSCICL
CS0DL
EIP1
DPH
3(B)
TL1
Rev. 1.0
P0MDOUT P1MDOUT P2MDOUT
ADC0CF
P0SKIP
CS0DH
CS0MX
IT01CF
TMR2L
EIP2
TH0
4(C)
ADC0LTL
CPT0MD
CRC0IN
DERVID
P1SKIP
TMR2H
P0MAT
P1MAT
ADC0L
HWID
5(D)
TH1
C8051F80x-83x
CRC0DATA
SMB0ADM SMB0ADR
ADC0LTH
P0MASK
P1MASK
CRC0CN
CS0THL
CKCON
ADC0H
CS0CF
REVID
EIE1
6(E)
PCA0PWM
CRC0FLIP
VDM0CN
RSTSRC
CPT0MX
CS0THH
FLKEY
PSCTL
PCON
EIE2
7(F)
97