C8051F800DK Silicon Laboratories Inc, C8051F800DK Datasheet - Page 191

KIT DEV C8051F800

C8051F800DK

Manufacturer Part Number
C8051F800DK
Description
KIT DEV C8051F800
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F800DK

Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F800
Data Bus Width
16 bit
Interface Type
USB
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F8xx
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
336-1797
SFR Definition 26.3. SMB0ADR: SMBus Slave Address
SFR Address = 0xD7
SFR Definition 26.4. SMB0ADM: SMBus Slave Address Mask
SFR Address = 0xD6
Name
Reset
Name
Reset
Bit
7:1
Bit
7:1
Type
Type
0
0
Bit
Bit
SLVM[6:0]
SLV[6:0]
EHACK
Name
Name
GC
7
0
7
1
SMBus Hardware Slave Address.
Defines the SMBus Slave Address(es) for automatic hardware acknowledgement.
Only address bits which have a 1 in the corresponding bit position in SLVM[6:0]
are checked against the incoming address. This allows multiple addresses to be
recognized.
General Call Address Enable.
When hardware address recognition is enabled (EHACK = 1), this bit will deter-
mine whether the General Call Address (0x00) is also recognized by hardware.
0: General Call Address is ignored.
1: General Call Address is recognized.
SMBus Slave Address Mask.
Defines which bits of register SMB0ADR are compared with an incoming address
byte, and which bits are ignored. Any bit set to 1 in SLVM[6:0] enables compari-
sons with the corresponding bit in SLV[6:0]. Bits set to 0 are ignored (can be either
0 or 1 in the incoming address).
Hardware Acknowledge Enable.
Enables hardware acknowledgement of slave address and received data bytes.
0: Firmware must manually acknowledge all incoming address and data bytes.
1: Automatic Slave Address Recognition and Hardware Acknowledge is Enabled.
6
0
6
1
5
0
5
1
SLVM[6:0]
SLV[6:0]
R/W
R/W
Rev. 1.0
4
0
4
1
Function
Function
3
0
3
1
C8051F80x-83x
2
0
2
1
1
0
1
1
EHACK
R/W
R/W
GC
0
0
0
0
191

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