C8051T606DK Silicon Laboratories Inc, C8051T606DK Datasheet - Page 146

• Manufacturer Part Number: C8051T606DK
• Description: KIT DEVELOPMENT FOR C8051T606
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051T606DK

• Contents: Board, Adapter, Cable, CD, Power Supply
• Processor To Be Evaluated: C8051T606x
• Interface Type: RS-232, USB
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051T606
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1666

C8051T600/1/2/3/4/5/6
SFR Definition 25.1. CKCON: Clock Control
SFR Address = 0x8E
146
Name
Reset
1:0
Bit
Type
7
6
5
4
3
2
Bit
SCA[1:0] Timer 0/1 Prescale Bits.
Unused
Unused
Name
T2MH
T2ML
T1M
T0M
R
7
0
Unused. Read = 0b, Write = Don’t Care
Timer 2 High Byte Clock Select.
Selects the clock supplied to the Timer 2 high byte (split 8-bit timer mode only).
0: Timer 2 high byte uses the clock defined by the T2XCLK bit in TMR2CN.
1: Timer 2 high byte uses the system clock.
Timer 2 Low Byte Clock Select.
Selects the clock supplied to Timer 2. If Timer 2 is configured in split 8-bit timer mode,
this bit selects the clock supplied to the lower 8-bit timer.
0: Timer 2 low byte uses the clock defined by the T2XCLK bit in TMR2CN.
1: Timer 2 low byte uses the system clock.
Timer 1 Clock Select.
Selects the clock source supplied to Timer 1. Ignored when C/T1 is set to 1.
0: Timer 1 uses the clock defined by the prescale bits SCA[1:0].
1: Timer 1 uses the system clock.
Timer 0 Clock Select.
Selects the clock source supplied to Timer 0. Ignored when C/T0 is set to 1.
0: Counter/Timer 0 uses the clock defined by the prescale bits SCA[1:0].
1: Counter/Timer 0 uses the system clock.
Unused. Read = 0b, Write = Don’t Care
These bits control the Timer 0/1 Clock Prescaler:
00: System clock divided by 12
01: System clock divided by 4
10: System clock divided by 48
11: External clock divided by 8 (synchronized with the system clock)
T2MH
R/W
6
0
T2ML
R/W
5
0
T1M
R/W
Rev. 1.2
4
0
Function
T0M
R/W
3
0
R
2
0
1
0
SCA[1:0]
R/W
0
0