C8051T606DK Silicon Laboratories Inc, C8051T606DK Datasheet - Page 83
C8051T606DK
Manufacturer Part Number
C8051T606DK
Description
KIT DEVELOPMENT FOR C8051T606
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets
1.C8051T600EDB.pdf
(188 pages)
2.C8051T606TDB.pdf
(1 pages)
3.C8051T606DK.pdf
(16 pages)
4.C8051T606TDB.pdf
(14 pages)
Specifications of C8051T606DK
Contents
Board, Adapter, Cable, CD, Power Supply
Processor To Be Evaluated
C8051T606x
Interface Type
RS-232, USB
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T606
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1666
- C8051T600EDB PDF datasheet
- C8051T606TDB PDF datasheet #2
- C8051T606DK PDF datasheet #3
- C8051T606TDB PDF datasheet #4
- Current page: 83 of 188
- Download datasheet (898Kb)
SFR Definition 17.1. IE: Interrupt Enable
SFR Address = 0xA8; Bit-Addressable
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
IEGF0
Name
ET2
ES0
ET1
EX1
ET0
EX0
EA
R/W
EA
7
0
Enable All Interrupts.
Globally enables/disables all interrupts. It overrides individual interrupt mask settings.
0: Disable all interrupt sources.
1: Enable each interrupt according to its individual mask setting.
General Purpose Flag 0.
This is a general purpose flag for use under software control.
Enable Timer 2 Interrupt.
This bit sets the masking of the Timer 2 interrupt.
0: Disable Timer 2 interrupt.
1: Enable interrupt requests generated by the TF2L or TF2H flags.
Enable UART0 Interrupt.
This bit sets the masking of the UART0 interrupt.
0: Disable UART0 interrupt.
1: Enable UART0 interrupt.
Enable Timer 1 Interrupt.
This bit sets the masking of the Timer 1 interrupt.
0: Disable all Timer 1 interrupt.
1: Enable interrupt requests generated by the TF1 flag.
Enable External Interrupt 1.
This bit sets the masking of External Interrupt 1.
0: Disable External Interrupt 1.
1: Enable interrupt requests generated by the INT1 input.
Enable Timer 0 Interrupt.
This bit sets the masking of the Timer 0 interrupt.
0: Disable all Timer 0 interrupt.
1: Enable interrupt requests generated by the TF0 flag.
Enable External Interrupt 0.
This bit sets the masking of External Interrupt 0.
0: Disable External Interrupt 0.
1: Enable interrupt requests generated by the INT0 input.
IEGF0
R/W
6
0
R/W
ET2
5
0
ES0
R/W
Rev. 1.2
4
0
Function
C8051T600/1/2/3/4/5/6
R/W
ET1
3
0
EX1
R/W
2
0
R/W
ET0
1
0
EX0
R/W
0
0
83
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