C8051T606DK Silicon Laboratories Inc, C8051T606DK Datasheet - Page 58
C8051T606DK
Manufacturer Part Number
C8051T606DK
Description
KIT DEVELOPMENT FOR C8051T606
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets
1.C8051T600EDB.pdf
(188 pages)
2.C8051T606TDB.pdf
(1 pages)
3.C8051T606DK.pdf
(16 pages)
4.C8051T606TDB.pdf
(14 pages)
Specifications of C8051T606DK
Contents
Board, Adapter, Cable, CD, Power Supply
Processor To Be Evaluated
C8051T606x
Interface Type
RS-232, USB
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T606
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1666
- C8051T600EDB PDF datasheet
- C8051T606TDB PDF datasheet #2
- C8051T606DK PDF datasheet #3
- C8051T606TDB PDF datasheet #4
- Current page: 58 of 188
- Download datasheet (898Kb)
C8051T600/1/2/3/4/5/6
SFR Definition 12.1. REG0CN: Voltage Regulator Control
SFR Address = 0xC7
58
Name
Reset
5:1
Bit
Type
7
6
0
Bit
Reserved Reserved. Must Write 00000b.
STOPCF Stop Mode Configuration.
BYPASS Bypass Internal Regulator.
MPCE
Name
STOPCF
R/W
7
0
This bit configures the regulator’s behavior when the device enters STOP mode.
0: Regulator is still active in STOP mode. Any enabled reset source will reset the
device.
1: Regulator is shut down in STOP mode. Only the RST pin or power cycle can reset
the device.
This bit places the regulator in bypass mode, turning off the regulator, and allowing the
core to run directly from the V
0: Normal Mode—Regulator is on.
1: Bypass Mode—Regulator is off, and the microcontroller core operates directly from
the V
IMPORTANT: Bypass mode is for use with an external regulator as the supply
voltage only. Never place the regulator in bypass mode when the V
voltage is greater than the specifications given in Table 8.1 on page 30. Doing so
may cause permanent damage to the device.
Memory Power Controller Enable.
This bit can help the system save power at slower system clock frequencies (about
2.0 MHz or less) by automatically shutting down the EPROM memory between clocks
when information is not being fetched from the EPROM memory.
0: Normal Mode—Memory power controller disabled (EPROM memory is always on).
1: Low Power Mode—Memory power controller enabled (EPROM memory turns on/off
as needed).
Note: If an external clock source is used with the Memory Power Controller enabled, and the
BYPASS
DD
R/W
clock frequency changes from slow (<2.0 MHz) to fast (> 2.0 MHz), the EPROM power
will turn on, and up to 20 clocks may be "skipped" to ensure that the EPROM power is
stable before reading memory.
6
0
supply voltage.
R/W
5
0
DD
R/W
Rev. 1.2
4
0
supply pin.
Function
R/W
3
0
R/W
2
0
R/W
1
0
DD
supply
MPCE
R/W
0
0
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