DK-EMB-3C120N Altera, DK-EMB-3C120N Datasheet - Page 17

KIT DEV EMB CYCLONE III EDITION

DK-EMB-3C120N

Manufacturer Part Number
DK-EMB-3C120N
Description
KIT DEV EMB CYCLONE III EDITION
Manufacturer
Altera
Series
Cyclone® IIIr
Type
FPGAr

Specifications of DK-EMB-3C120N

Contents
Board, Cables, CD(s), USB-Blaster™, Power Supply
Architecture
PLD/FPGA
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Cyclone
Silicon Core Number
EP3C
Silicon Family Name
Cyclone III
Rohs Compliant
Yes
For Use With/related Products
EP3C120
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2589

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-EMB-3C120N
Manufacturer:
Altera
Quantity:
135
Part Number:
DK-EMB-3C120N
Manufacturer:
ALTERA
0
Chapter 4: Development Board Setup
Powering Up the Board
September 2010 Altera Corporation
w
Table 4–1. Switch SW1 Settings (Part 2 of 2)
4. Ensure that the 4-position SW3 mini-DIP switches and the two jumpers are set to
Table 4–2. Initial Switch and Jumper Settings
5. Verify that the PGM CONFIG SELECT rotary switch SW5 is set to 0.
At power up, the development board uses a preloaded configuration to demonstrate
that the board is operating correctly.
Power up the development board by performing the following steps:
1. Connect the 16-V DC adapter to the development board and to a power source.
Use only the supplied 16-V power supply. Power regulation circuitry on the board
could be damaged by supplies greater than 16 V.
2. Slide the POWER switch to ON. The nearby blue POWER light-emitting diode
3. Confirm that user LEDs 0-7 flash in a scrolling, side-to-side pattern. For
Note to
(1) X = don’t care
DEV_SEL-J6
the default positions shown in
(LED) lights up.
customized configurations, the pattern depends on the application.
f
Switch
ON
3
4
5
6
7
8
Table
For information about custom configurations, refer to
Flash Device” on page
4–1:
JTAG_SEL-J7
MAX0
MAX1
MAX2
MAX3
Name
RSV0
RSV1
ON
SW3.1
A–4.
PFL Disable
Position 0
Table
ON
4–2.
MAX_RESERVE0
MAX_RESERVE1
MAX_DIP1
MAX_DIP2
MAX_DIP3
Function
SW3.2
OFF
PFL Enable
Position 1
Cyclone III FPGA Development Kit User Guide
SW3.3
OFF
“Programming the
Position
Default
X
X
1
X
X
X
SW3.4
OFF
4–3

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