DK-EMB-3C120N Altera, DK-EMB-3C120N Datasheet - Page 36

• Manufacturer Part Number: DK-EMB-3C120N
• Description: KIT DEV EMB CYCLONE III EDITION
• Manufacturer: Altera
• Series: Cyclone® IIIr
• Type: FPGAr

Specifications of DK-EMB-3C120N

• Contents: Board, Cables, CD(s), USB-Blaster™, Power Supply
• Architecture: PLD/FPGA
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Silicon Core Number: EP3C
• Silicon Family Name: Cyclone III
• Rohs Compliant: Yes
• For Use With/related Products: EP3C120
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2589

7–4
Cyclone III FPGA Development Kit User Guide
Measuring Voltage with a DMM
f
1
2. Download the cycloneIII_dev_powerdemo.sof file as described in
3. Set the POWER SELECT rotary switch SW4 to 5.
4. Observe the 4-digit hexadecimal display for the I/O output power in watts on
5. Using the user input push buttons
6. Press the User_PB3 button to enable the output pins on the HSMC connectors J8
7. Press the User_PB3 button again to disable the outputs. LED7 turns off.
8. Set the POWER SELECT rotary switch SW4 to 6.
9. Repeat steps
The sum of power results from the two sets of I/O banks provides the total FPGA I/O
power.
For specific information about on-board measurements and the POWER SELECT
rotary switch, refer to the
To obtain power values by using a DMM, measure voltage across the sense resistors,
R49, R48, and R51 on the board, then use the voltage measurements to calculate
power.
For best results, use a DMM with six-digit for greater accuracy.
FPGA I/O power is distributed by banks
components R48 and R51. For the I/O power calculation, use the sum of voltage
measurements across these resistors while outputs are enabled. For the FPGA core
power calculation, measure the sense resistor voltage across R49.
Table 7–5. Sense Resistors
the FPGA” on page
<path>\...\examples\cycloneIII_3c120_dev_powerdemo.
banks 1 and 2.
power states in
as frequency and resources increase.
and J9. LED7 (AF19), signal o_noutput_ena_state, lights to indicate that the
outputs are enabled and toggling. Enabling the outputs further increases power
for each resource utilization percentage used by the Cyclone III FPGA.
6.
I/O
FPGA Power
Core: V
4
CC_INT
through
Table 7–2
Banks 1 and 2
Banks 5 and 6
4–4. The power design example is in
Cyclone III 3C120 Development Board Reference
7
to observe the I/O output power in watts on banks 5 and
and
Table 7–3 on page
(Table 7–1 on page
Voltage
2.5 V
2.5 V
1.2 V
(Table
7–5), for which the sense resistors are
7–2. Notice how power increases
Resistor
7–1), advance through the
Sense
R48
R51
R49
September 2010 Altera Corporation
Chapter 7: Power Measurement
“Configuring
Manual.
Measuring Power
Resistor
0.009 Ω
0.009 Ω
0.009 Ω
Value