DK-EMB-3C120N Altera, DK-EMB-3C120N Datasheet - Page 30

• Manufacturer Part Number: DK-EMB-3C120N
• Description: KIT DEV EMB CYCLONE III EDITION
• Manufacturer: Altera
• Series: Cyclone® IIIr
• Type: FPGAr

Specifications of DK-EMB-3C120N

• Contents: Board, Cables, CD(s), USB-Blaster™, Power Supply
• Architecture: PLD/FPGA
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Silicon Core Number: EP3C
• Silicon Family Name: Cyclone III
• Rohs Compliant: Yes
• For Use With/related Products: EP3C120
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2589

6–10
Figure 6–6. The DDR2 Tab
Cyclone III FPGA Development Kit User Guide
The DDR2 Tab
The DDR2 tab allows you to read and write to one of two DDR2 memory ports on
your board. The DDR2 memory configuration is divided into top design
(implemented by DDR2 chip U11, U12, U13) and bottom design (implemented by
DDR2 chip U25, U26).
with DDR2 top design.
The following sections describe the controls on the DDR2 tab.
Start
The Start control initiates DDR2 memory transaction performance analysis.
Stop
The Stop control terminates transaction performance analysis.
Figure 6–6
shows the DDR2 tab when the board is configured
September 2010 Altera Corporation
Chapter 6: Board Test System
Using the Board Test System