DK-EMB-3C120N Altera, DK-EMB-3C120N Datasheet - Page 27

• Manufacturer Part Number: DK-EMB-3C120N
• Description: KIT DEV EMB CYCLONE III EDITION
• Manufacturer: Altera
• Series: Cyclone® IIIr
• Type: FPGAr

Specifications of DK-EMB-3C120N

• Contents: Board, Cables, CD(s), USB-Blaster™, Power Supply
• Architecture: PLD/FPGA
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Silicon Core Number: EP3C
• Silicon Family Name: Cyclone III
• Rohs Compliant: Yes
• For Use With/related Products: EP3C120
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2589

Chapter 6: Board Test System
Using the Board Test System
Figure 6–4. The SRAM&Flash Tab
September 2010 Altera Corporation
The SRAM&Flash Tab
1
The SRAM&Flash tab allows you to read and write SRAM and flash memory on your
board.
The following sections describe the controls on the SRAM&Flash tab.
SRAM
The SRAM control allows you to read and write the SRAM on your board. Type a
starting address in the text box and click Read. Values starting at the specified address
appear in the top row of the table. The SRAM addresses display in the format the
Nios II processor within the FPGA uses, that is, each SRAM address is offset by
0x00000000. Thus, the first location in SRAM appears as 0x00000000 in the GUI. The
base address of SRAM in this Nios II-based BTS design is 0x0D00.0000. The valid
address range within the 2-MB SRAM is 0x0000.0000 through 0x001F.FFFF, as shown
in the GUI.
If you enter an address outside of the 0x00000000 to 0x001FFF80 SRAM address space,
a warning message identifies the valid SRAM address range.
Figure 6–4
shows the SRAM&Flash tab.
Cyclone III FPGA Development Kit User Guide
6–7