DK-EMB-3C120N Altera, DK-EMB-3C120N Datasheet - Page 35

KIT DEV EMB CYCLONE III EDITION

DK-EMB-3C120N

Manufacturer Part Number
DK-EMB-3C120N
Description
KIT DEV EMB CYCLONE III EDITION
Manufacturer
Altera
Series
Cyclone® IIIr
Type
FPGAr

Specifications of DK-EMB-3C120N

Contents
Board, Cables, CD(s), USB-Blaster™, Power Supply
Architecture
PLD/FPGA
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Cyclone
Silicon Core Number
EP3C
Silicon Family Name
Cyclone III
Rohs Compliant
Yes
For Use With/related Products
EP3C120
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2589

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-EMB-3C120N
Manufacturer:
Altera
Quantity:
135
Part Number:
DK-EMB-3C120N
Manufacturer:
ALTERA
0
Chapter 7: Power Measurement
Measuring Power
Measuring Power
September 2010 Altera Corporation
A/D Measurements
f
You can measure power by using the analog-to-digital (A/D) circuitry on the
development board or by using a digital multi-meter (DMM) across on-board sense
resistors. However, note that, depending on the DMM accuracy, the on-board A/D
measurements tend to produce considerably more accurate results.
The POWER SELECT rotary switch SW4 sets the development board to measure and
display FPGA core power or I/O output power
Table 7–4. Switch SW4 Power Selection
Measuring V
To measure FPGA core power at V
following steps:
1. Ensure that the 8-position SW1 DIP switch is configured to the default settings
2. Download the cycloneIII_3c120_dev_power_demo.sof file as described in
3. Set the POWER SELECT rotary switch SW4 to 0 to measure the internal V
4. Observe the power on the 4-digit hexadecimal power display.
5. Using the user input push buttons
For information about measuring power sources, refer to the
Development Board Reference
Measuring I/O Power
This example uses FPGA I/O banks 1, 2, 5, and 6. Using the SW4 settings
measure the power for I/O banks 1 and 2, then for I/O banks 5 and 6, by performing
the following steps:
1. Ensure that the 8-position SW1 DIP switch is configured to the default settings
shown in
“Configuring the FPGA” on page
<path>\...\examples\cycloneIII_3c120_dev_power_demo.
power in watts.
The on-board power measurements are performed at a high rate. For this reason, it
appears that the display is dithering; however, what is actually taking place is the
very fast momentary changes on the power rail.
power states in
as frequency and resources increase.
shown in
Switch Position
Table 4–1 on page
Table 4–1 on page
0
5
6
CC_INT
Table 7–2
Power
Manual.
and
4–2.
4–2.
Table 7–3 on page
CC_INT
Core: V
FPGA Power
4–4. You can find the power design example in
(Table 7–1 on page
I/O: 2.5 V
I/O: 2.5 V
= 1.2 V for various power states, perform the
CC_INT
, 1.2 V
(Table
7–2. Notice how power increases
Cyclone III FPGA Development Kit User Guide
7–4).
7–1), advance through the
Cyclone III 3C120
I/O Banks
1 and 2
5 and 6
(Table
CC_INT
7–4),
7–3

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