ADSP-3PARCBF548E02 Analog Devices Inc, ADSP-3PARCBF548E02 Datasheet - Page 33
![KIT DEV STARTER BF548](/photos/9/25/92500/adsp-3parcbf548e02_kit_sml.jpg)
ADSP-3PARCBF548E02
Manufacturer Part Number
ADSP-3PARCBF548E02
Description
KIT DEV STARTER BF548
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
DSPr
Specifications of ADSP-3PARCBF548E02
Contents
Board, Cables, CD, Headset with Microphone, Module, Power Supply
For Use With/related Products
ADSP-BF548
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 12. Pin Descriptions (Continued)
1
2
3
4
5
6
7
8
9
10
11
12
13
Pin Name
V
GND
V
GND
I = Input, O = Output, P =Power, G = Ground, C = Crystal, A = Analog.
Refer to
To use the SPI memory boot, SPI0SCK should have a pulldown, SPI0MISO should have a pullup, and SPI0SEL1 is used as the CS with a pullup.
HWAIT/HWAITA should be pulled high or low to configure polarity. See
GPW functionality is available when MXVR is not present or unused.
This pin should not be used as GPIO if booting in mode 1.
This pin should always be enabled as ND_CE in software and pulled high with a resistor when using NAND flash.
This pin should always be enabled as BR in software and pulled high to enable asynchronous access.
This pin must be pulled low through a 10kOhm resistor if self-refresh mode is desired during hibernate state or deep-sleep mode.
If the USB is used in device mode only, the USB_ID pin should be either pulled high or left unconnected.
This pin is an output only during initialization of USB OTG session request pulses. Therefore, host mode or OTG type A mode requires that an external voltage source of
To ensure proper operation, the power pins should be driven to their specified level even if the associated peripheral is not used in the application.
This pin must always be connected. If the internal voltage regulator is not being used, this pin may be connected to V
5 V, at 8 mA or more per the OTG specification, be applied to this pin. Other OTG modes require that this external voltage be disabled.
VDDVR specification. For automotive grade models, the internal voltage regulator must not be used and this pin must be tied to V
DDVR
DDMP
MP
13
12
12
Table 61 on Page 86
through
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Table 70 on Page 87
for driver types.
Rev. C | Page 33 of 100 | February 2010
I/O
P
G
P
G
1
Function (First/Second/Third/Fourth)
Internal Voltage Regulator Power Supply (Connect to V
when unused.)
Ground
MXVR PLL Power Supply. (Must be driven to same level as V
to V
MXVR PLL Ground (Connect to GND when unused or when MXVR is not
present.)
Booting Modes on Page
DDINT
when unused or when MXVR is not present.)
19.
DDEXT
. Otherwise it should be powered according to the
DDEXT
.
DDEXT
DDINT
. Connect
Driver
Type
2