R0K561668S000BE Renesas Electronics America, R0K561668S000BE Datasheet - Page 22
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R0K561668S000BE
Manufacturer Part Number
R0K561668S000BE
Description
KIT STARTER FOR H8SX/1668
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Specifications of R0K561668S000BE
For Use With/related Products
H8SX/1668
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Contents
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 22 of 936
- Download datasheet (12Mb)
Section 1 CPU
• Stack Structure
Rev. 4.00 Sep. 18, 2008 Page 4 of 914
REJ09B0102-0400
In normal mode, the top area starting at H'0000 is allocated to the exception vector table. One
branch address is stored per 16 bits. The structure of the exception vector table is shown in
figure 1.2.
The memory indirect (@@aa:8) and extended memory indirect (@@vec:7) addressing modes
are used in the JMP and JSR instructions. An 8-bit absolute address included in the instruction
code specifies a memory location. Execution branches to the contents of the memory location.
The stack structure of PC at a subroutine branch and that of PC and CCR at an exception
handling are shown in figure 1.3. The PC contents are saved or restored in 16-bit units.
SP
Notes: 1.
(a) Subroutine Branch
2.
3.
Figure 1.2 Exception Vector Table (Normal Mode)
When EXR is not used it is not stored on the stack.
SP when EXR is not used.
Ignored on return.
H'0000
H'0001
H'0002
H'0003
Figure 1.3 Stack Structure (Normal Mode)
(16 bits)
PC
Reset exception vector
Reset exception vector
(SP
SP
*
2
)
(b) Exception Handling
Exception
vector table
Reserved*
(16 bits)
CCR*
EXR*
CCR
PC
1
3
1
, *
3
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