R0K561668S000BE Renesas Electronics America, R0K561668S000BE Datasheet - Page 920

• Manufacturer Part Number: R0K561668S000BE
• Description: KIT STARTER FOR H8SX/1668
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of R0K561668S000BE

• For Use With/related Products: H8SX/1668
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Contents: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Section 3 Processing States
3.4
In this state the CPU executes program instructions in sequence.
3.5
In this state, the bus has been released in response to a bus request from a bus master other than
the CPU. While the bus is released, the CPU halts except for internal operations.
3.6
The power-down state includes both modes in which the CPU stops operating and modes in which
the CPU does not stop. There are three modes in which the CPU stops operating: sleep mode,
software standby mode, and hardware standby mode.
There are also two other power-down modes: medium-speed mode and module stop mode. In
medium-speed mode, the CPU operates on a medium-speed clock. Module stop mode permits
halting of the operation of individual modules, other than the CPU. For details, see the hardware
manual for the corresponding product.
3.6.1
A transition to sleep mode is made if the SLEEP instruction is executed while the SSBY bit in the
standby control register (SBYCR) is cleared to 0. In sleep mode, CPU operations stop
immediately after execution of the SLEEP instruction. The contents of CPU registers are retained.
3.6.2
A transition to software standby mode is made if the SLEEP instruction is executed while the
SSBY bit in SBYCR is set to 1. In software standby mode, the CPU, clock pulse generator, and all
on-chip peripheral modules stop operating. The on-chip peripheral modules are reset, but as long
as a specified voltage is supplied, the contents of CPU registers and on-chip RAM are retained.
The I/O ports also remain in their existing states.
3.6.3
A transition to hardware standby mode is made when the STBY pin goes low. In hardware
standby mode, all functions enter the reset state and all operations stop. As long as a specified
voltage is supplied, the on-chip RAM contents are retained.
Rev. 4.00 Sep. 18, 2008 Page 902 of 914
REJ09B0102-0400
Program Execution State
Bus-Released State
Power-Down State
Sleep Mode
Software Standby Mode
Hardware Standby Mode