DK-VIDEO-4SGX230N Altera, DK-VIDEO-4SGX230N Datasheet - Page 25

• Manufacturer Part Number: DK-VIDEO-4SGX230N
• Description: VIDEO KIT STRATIX IV EP4SGX230
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-VIDEO-4SGX230N

• Contents: Board, Daughter Card, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2602

Chapter 6: Board Test System
Preparing the Board
Preparing the Board
Running the Board Test System
Using the Board Test System
© November 2009 Altera Corporation
1
1
With the power to the board off, perform the following steps:
1. Connect the USB cable to the board.
2. Verify the settings for the board settings DIP switch bank (SW4) match
3. Set the rotary switch (SW2) to the 1 position.
4. Verify the settings for the JTAG DIP switch bank (SW6), located on the back of the
5. Turn the power to the board on. The board loads the design stored in the user
To run the application, navigate to the <install
dir>\kits\stratixIVGX_4sgx230_av\examples\board_test_system directory and run
the BoardTestSystem.exe application.
On Windows, click Start > All Programs > Altera > Audio Video Development Kit,
Stratix IV GX Edition <version> > Board Test System to run the application.
A GUI appears, displaying the application tab that corresponds to the design running
in the FPGA. The Stratix IV GX FPGA development board’s flash memory ships
preconfigured with the design that corresponds to the Config, GPIO, and
SRAM&Flash tabs.
If you power up your board with the rotary switch (SW2) in a position other than the
1 position, or if you load your own design into the FPGA with the Quartus II
Programmer, you receive a message prompting you to configure your board with a
valid Board Test System design. Refer to
configuring your board.
This section describes each control in the Board Test System application.
on page
board, match
include in the JTAG chain.
f
portion of flash memory into the FPGA. If your board is still in the factory
configuration or if you have downloaded a newer version of the Board Test
System to flash memory through the Board Update Portal, the design that tests the
GPIO, SRAM, and flash memory loads.
c
To ensure operating stability, keep the USB cable connected and the board
powered on when running the demonstration application. The application
cannot run correctly unless the USB cable is attached and the board is on.
For more information about the board’s DIP switch and jumper settings,
refer to the
4–3.
Table 4–4 on page
Stratix IV GX FPGA Development Board Reference
4–4. These settings determine the devices to
“The Configure Menu”
Audio Video Development Kit, Stratix IV GX Edition User Guide
for information about
Manual.
Table 4–2
6–3