DK-VIDEO-4SGX230N Altera, DK-VIDEO-4SGX230N Datasheet - Page 33

• Manufacturer Part Number: DK-VIDEO-4SGX230N
• Description: VIDEO KIT STRATIX IV EP4SGX230
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-VIDEO-4SGX230N

• Contents: Board, Daughter Card, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2602

Chapter 6: Board Test System
Using the Board Test System
The QDRII+ Tab
© November 2009 Altera Corporation
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Error Control
The Error control controls track transaction errors detected during analysis:
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Number of Addresses to Write andRead
The Number of addresses to write andread control determines the number of
addresses to use in each iteration of reads and writes. Valid values range from 2 to
524,288.
Data Type
The Data type control specifies the type of data contained in the transactions. The
following data types are available for analysis:
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Read and Write Control
The Read and write control control specifies the type of transactions to analyze. The
following transaction types are available for analysis:
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The QDRII+ tab allows you to read and write the QDR II+ memory on your board
and independently test each QDR II+ port.
Write, Read, and Total performance bars—Show the percentage of maximum data
rate that the requested transactions are able to achieve.
Write (MBps), Read (MBps), and Total (MBps)—Show the number of bytes of
data analyzed per second.
Detected errors—Displays the number of transaction errors detected in the
hardware.
Inserted errors—Displays the number of errors inserted into the transaction
stream.
Insert Error—Inserts a one-word error into the transaction stream each time you
click the button. Insert Error is only enabled during transaction performance
analysis.
Clear—Resets the Detected Errors and Inserted Errors counters to zeros.
PRBS—Selects pseudo-random bit sequences.
Memory—Selects a generic data pattern stored in the on chip memory of the
Stratix IV GX device.
Math—Selects data generated from a simple math function within the FPGA
fabric.
Write then read—Selects read and write transactions for analysis.
Read only—Selects read transactions for analysis.
Write only—Selects write transactions for analysis.
Audio Video Development Kit, Stratix IV GX Edition User Guide
Figure 6–6
shows the QDRII+ tab.
6–11