DK-VIDEO-4SGX230N Altera, DK-VIDEO-4SGX230N Datasheet - Page 42

• Manufacturer Part Number: DK-VIDEO-4SGX230N
• Description: VIDEO KIT STRATIX IV EP4SGX230
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-VIDEO-4SGX230N

• Contents: Board, Daughter Card, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2602

6–20
The SDI HSMC - Video Tab
Audio Video Development Kit, Stratix IV GX Edition User Guide
■
AES in2
The AES in2 controls track transmit errors detected during analysis of AES channel 2.
To track the test results, connect a BNC loopback cable between AES OUT 2 (J14) and
AES IN 2 (J15).
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SDI in1
The SDI in1 controls track transmit errors detected during analysis of SDI channel 1.
To track the test results, connect a BNC loopback cable between SDI OUT 1 (J8) and
SDI IN 1 (J9).
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■
■
■
SDI in2
The SDI in1 controls track transmit errors detected during analysis of SDI channel 2.
To track the test results, connect a BNC loopback cable between SDI OUT 2 (J1) and
SDI IN 2 (J2).
■
■
■
■
The SDI HSMC - Video tab allows you to generate video patterns, and send and
receive SDI video through the SDI HSMC.
tab.
Clear—Resets the Errors counter to zero.
Errors—Displays the number of errors detected in the hardware.
Insert Error—Inserts a bit error into the transmit data stream each time you click
the button.
Clear—Resets the Errors counter to zero.
Errors—Displays the number of errors detected in the hardware.
PLL lock—Shows the receiver PLL locked or unlocked state.
Insert Error—Inserts a bit error into the transmit data stream each time you click
the button.
Clear—Resets the Errors counter to zero.
Errors—Displays the number of errors detected in the hardware.
PLL lock—Shows the receiver PLL locked or unlocked state.
Insert Error—Inserts a bit error into the transmit data stream each time you click
the button.
Clear—Resets the Errors counter to zero.
Figure 6–11
shows the SDI HSMC - Video
© November 2009 Altera Corporation
Chapter 6: Board Test System
Using the Board Test System