STV-974/552S-R01 STMicroelectronics, STV-974/552S-R01 Datasheet - Page 27

no-image

STV-974/552S-R01

Manufacturer Part Number
STV-974/552S-R01
Description
KIT DEMO W/VS6552
Manufacturer
STMicroelectronics

Specifications of STV-974/552S-R01

Sensor Type
CMOS Imaging, Color (RGB)
Sensing Range
VGA
Interface
I²C
Sensitivity
30 fps
Embedded
No
Utilized Ic / Part
STV0974E, VS6552
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-3891
Note: 1 During DMA transfer, it is assumed that reading DR returns a byte from the FIFO, which means that
27/61
Functional description
2 At the end of the transfer, FIFO underrun can occur if the image size is not an integer multiple of the
4 DRQ is released after the first byte is read.
5 After the last byte of the burst is read, the transfer terminates on step 6 if the FIFO is empty and
6 IRQ is asserted to signal the end of image transfer; the DMA channel is closed and re-initialized
This behavior ensures that no request can be missed by the controller, assuming DRQ is an edge-
sensitive signal. DRQ polarity can be reversed through MICR[POL] bit.
AR shall be pointing to the FIFO when the DMA channel is active. To access other registers while
performing DMA, the DMA controller must be halted and pending transfers properly flushed; then
indirect accesses to the camera subsystem can occur. Finally, AR must be restored and the DMA
controller released.
burst size: dummy bytes are appended at the end of the image buffer. Nevertheless, the JPEG end-
of-frame marker (0xffd9) delineates the buffer.
the frame end is reached. Otherwise, transfer continues on step 2.
for the next transfer.
STV0974

Related parts for STV-974/552S-R01