M5407C3 Freescale Semiconductor, M5407C3 Datasheet - Page 16

• Manufacturer Part Number: M5407C3
• Description: KIT EVAL FOR MCF5407 W/ETHERNET
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: Microprocessorr

Specifications of M5407C3

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MCF5407
• Interface Type: Ethernet
• For Use With/related Products: MCF5407
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Freescale Semiconductor, Inc.
System Memory
1.2 System Memory
One on board Flash ROM (U12) is used to store the M5407C3 dBUG debugger/monitor
firmware in the lower 128 KBytes. The AM29PL160C-XX device is 16Mbits (16 bit by 1
MByte) giving a total of 2MBytes of Flash memory.
The PCI bridge chip provides the interface to the Universal 32-bit PCI on board connector
allowing the user to experiment and develop new applications to commercially available
slave PCI based peripherals products.
The MCF5407 has 4KBytes of internal SRAM organized as two independently
configurable 2 Kbyte blocks. each block can be configured for either data or instruction
space.
There is one 168-pin DIMM socket for SDRAM. System ships with 1M x 8 Bank x 16-Bits
SDRAM totaling 16M of volatile memory. Various SDRAM configurations are supported.
The internal caches of the MCF5407 are non-blocking. The data cache is 8 KByte, 4-way
set-associative with a 16-byte line size. The instruction cache is 16 KBytes, 4-way
set-associative with a 16-byte line size. The ROM Monitor currently does not utilize the
caches, but programs downloaded with the ROM Monitor can use the cache.
The M5407C3 evaluation board has a foot print for 512 KByte SRAM but is unpopulated.
1.3 Serial Communication Channels
The MCF5407 has 2 built-in UART’s (UART0 and UART1) with independent baud rate
generators. The signals of both channels are passed through external Driver/Receivers to
make the channel compatible with RS-232. An RS232 serial cable with DB9 connectors is
included. UART0 (P4) is used by the debugger for the user to access with a terminal. In
addition, the signals of both channels are available on the 120 pin expansion connector J2.
UART0 channel is the “TERMINAL” channel used by the debugger for communication
with external terminal/PC. The “TERMINAL’ baud rate defaults to 19200.
1.4 Parallel I/O Ports
MCF5407 offers one 16-bit general-purpose parallel I/O port. Each pin can be individually
programmed as input or output. The parallel port bits PP[7:0] are multiplexed with
TT[1:0], TM[2:0], DREQ[1:0], and XTIP. The second set of parallel port bits PP[15:8] is
multiplexed with address bus bits A[31:24]. Both bytes of the parallel port are controlled
by the Pin Assignment Register (PAR). The pins are programmable on a pin by pin basis.
The setting of the multiplexed pins is determined by the configuration byte during reset.
After reset, PP[7:0] are configured as parallel port output pins and the PP[15:8] are
configured as A[31:24]. PP[7:4] are general purpose outputs and PP[3:0] are used by the
ROM Monitor to automatically configure the SDRAM address lines via the U27 mux.
1-4
M5407C3 User’s Manual