HS7750RKCI01H Renesas Electronics America, HS7750RKCI01H Datasheet - Page 32

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HS7750RKCI01H

Manufacturer Part Number
HS7750RKCI01H
Description
ON CHIP DEBUG EMULATOR
Manufacturer
Renesas Electronics America
Datasheets

Specifications of HS7750RKCI01H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
2.2.10
The emulator can display the SH7750R status during user program execution in realtime. It
displays the items selected in the [Extended Monitor Configuration] dialog box in the [Extended
Monitor] window during user program execution. The emulator can display the state of the
moment when a command is input for the specified register through the command-line function.
Notes: 1. This function is only valid during user program execution. If this function is used
Table 2.10 shows the details of the items that can be displayed.
Table 2.10 Display Status
Item
PC
SR
FPSCR
INTEVT
EXPEVT
FRQCR register
MMUCR.AT
ASID
CCR
SBUS
EBUS
SBTYPE
26
2.
3.
4.
CPU Status Acquisition
during a user program break, an undefined value is displayed.
A read value during reset is not guaranteed.
In the sleep or deep sleep mode, only the STATUS or FRQCR can be read.
The display is updated in the 1000- to 65535-ms interval.
Example
H’A0000104
H’000000F0
H’000000F0
H’00000100
H’00000600
H’00000102
H’0
H’01
H’00000001
H’00000000
H’0000000
B’1101
Description
Displays the PC value.
Displays the SR register value.
Displays the FPSCR register value.
Displays the INTEVT register value.
Displays the EXPEVT register value.
Displays the FRQCR register value.
Displays the AT bit value in the MMUCR register.
Displays the ASID value in the PTEH register.
Displays the CCR register value.
Displays the load/store bus address. (internal bus)
Displays the external bus address.
Displays the internal bus state.
Each bit has the following meanings:
Bit3: Bus access
If bit 3 is 0, other bits of SBTYPE and all bits of SBUS are
invalid.
0: Without bus access
1: With bus access

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