HS7750RKCI01H Renesas Electronics America, HS7750RKCI01H Datasheet - Page 216

• Manufacturer Part Number: HS7750RKCI01H
• Description: ON CHIP DEBUG EMULATOR
• Manufacturer: Renesas Electronics America

Specifications of HS7750RKCI01H

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

8. Interrupt
9. Memory Access during User Program Break
10. Cache Operation during User Program Break
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Environment:
When a one-byte memory is read from the command-line window, the stopping time will be
about 8 ms.
When the NMIB bit in the ICR register is 1, the NMI interrupt is accepted during break and
the program is executed from the NMI interrupt vector. If the program cannot return normally
from the NMI interrupt routine or the value in the general-purpose register is not guaranteed, a
COMMUNICATION TIMEOUT error will occur.
The emulator can download the program for the flash memory area. Other memory write
operations are enabled for the RAM area. Therefore, an operation such as memory write,
BREAKPOINT, or user program download should be set only for the RAM area. When the
memory area can be written by the MMU, do not perform memory write, BREAKPOINT, or
downloading.
When cache is enabled, the emulator accesses the memory by the following methods:
Therefore, when memory read or write is performed during user program break, the cache
state will be changed.
At memory write: Writes through the cache, then writes to the memory.
At memory read: Does not change the cache write mode that has been set.
Host computer: 1 GHz (Pentium
OS: Windows
SH7750R: 267 MHz (CPU clock)
JTAG clock: 16.5 MHz
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