Z16F6411FI20SG Zilog, Z16F6411FI20SG Datasheet - Page 385

• Manufacturer Part Number: Z16F6411FI20SG
• Description: IC ZNEO MCU FLASH 64K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F6411FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F6x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4571

register file address map 25
registers
reset
S
SCK 175
SDA and SCL (IrDA) signals 204
serial clock 175
serial peripheral interface (SPI) 173
signal descriptions 12
SIO 4
slave data transfer formats (I2C) 210, 217
slave select 175
SPI
PS022008-0810
SPI control (SPICTL) 191
SPI data (SPIDATA) 190
SPI status (SPISTAT) 195
status, SPI 195
UARTx baud rate high byte (UxBRH) 162
UARTx baud rate low byte (UxBRL) 163
UARTx Control 0 (UxCTL0) 157, 162
UARTx control 1 (UxCTL1) 158, 160
UARTx receive data (UxRXD) 151
UARTx status 0 (UxSTAT0) 152, 153
UARTx status 1 (UxSTAT1) 155
UARTx transmit data (UxTXD) 151
watchdog timer control (WDTCTL) 331,
watchdog timer reload high byte (WDTH)
watchdog timer reload low byte (WDTL)
ADC channel 1 245
ADC data high byte 246, 250
ADC data low bit 247, 248, 249, 250, 251
and STOP mode characteristics 57
and STOP mode recovery 57
controller 4
architecture 173
baud rate generator 189
332
240
240
P R E L I M I N A R Y
SPI controller signals 13
SPI mode (SPIMODE) 193
SPIBRH register 198
SPIBRL register 199
SPICTL register 191
SPIDATA register 190
SPIMODE register 193
SPISTAT register 195
SS, SPI signal 175
STOP mode 65
STOP mode recovery
system 20
system and core resets 58
system vectors 20
T
tiing diagram, voltage measurement 243
timer signals 14
baud rate high and low byte register 198
clock phase 178
configured as slave 186
control register 191
control register definitions 189
data register 189, 190
error detection 186
interrupts 187
mode fault error 186
mode register 193
multi-master operation 183
operation 175
overrun error 186, 187
signals 175
single master, multiple slave system 184
single master,single slave system 184
status register 195
timing, PHASE = 0 179
timing, PHASE=1 180
sources 61
using a GPIO port pin transition 62
using watchdog timer time-out 62
Product Specification
ZNEO
Z16F Series
Index
369