Z16F6411FI20SG Zilog, Z16F6411FI20SG Datasheet - Page 50

• Manufacturer Part Number: Z16F6411FI20SG
• Description: IC ZNEO MCU FLASH 64K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F6411FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F6x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4571

PS022008-0810
Table 6. Register File Address Map (Continued)
Address (Hex)
FF_E400
FF_E401
FF_E402
FF_E403
FF_E404-F
DMA Channel 0 Base Address = FF_E410
FF_E410
FF_E411
FF_E412
FF_E413
FF_E414
FF_E415
FF_E416
FF_E417
FF_E418
FF_E419
FF_E41A
FF_E41B
FF_E41C
FF_E41D
FF_E41E
FF_E41F
DMA Channel 1 Base Address = FF_E420
FF_E420
FF_E421
FF_E422
FF_E423
FF_E424
FF_E425
FF_E426
FF_E427
FF_E428
Register Description
DMA0 Request Select
DMA1 Request Select
DMA2 Request Select
DMA3 Request Select
Reserved
DMA0 Control0
DMA0 Control1
DMA0 Transfer Length High
DMA0 Transfer Length Low
Reserved
DMA0 Destination Address Upper
DMA0 Destination Address High
DMA0 Destination Address Low
Reserved
DMA0 Source Address Upper
DMA0 Source Address High
DMA0 Source Address Low
Reserved
DMA0 List Address Upper
DMA0 List Address High
DMA0 List Address Low
DMA1 Control0
DMA1 Control1
DMA1 Transfer Length High
DMA1 Transfer Length Low
Reserved
DMA1 Destination Address Upper
DMA1 Destination Address High
DMA1 Destination Address Low
Reserved
P R E L I M I N A R Y
DMA0REQSEL
DMA1REQSEL
DMA2REQSEL
DMA3REQSEL
DMA0TXLNH
DMA1TXLNH
DMA0TXLNL
DMA1TXLNL
DMA0DARU
DMA0DARH
DMA0SARU
DMA0SARH
DMA1DARU
DMA1DARH
DMA0DARL
DMA0LARU
DMA0LARH
DMA1DARL
DMA0SARL
DMA0CTL0
DMA0CTL1
DMA0LARL
DMA1CTL0
DMA1CTL1
Mnemonic
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—
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Product Specification
Peripheral Address Map
Reset (Hex) Page No
ZNEO
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
—
—
—
—
—
—
Z16F Series
281
281
281
281
285
285
287
287
287
288
288
288
289
289
289
290
290
285
285
287
287
287
288
288
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—
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