MC9S12XEP100CAG Freescale Semiconductor, MC9S12XEP100CAG Datasheet - Page 365

IC MCU 16BIT 1M FLASH 144-LQFP

MC9S12XEP100CAG

Manufacturer Part Number
MC9S12XEP100CAG
Description
IC MCU 16BIT 1M FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
119
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
24-ch x 12-bit
Cpu Family
HCS12X
Device Core Size
16b
Frequency (max)
50MHz
Total Internal Ram Size
64KB
# I/os (max)
119
Number Of Timers - General Purpose
25
Operating Supply Voltage (typ)
1.8/2.8/5V
Operating Supply Voltage (max)
1.98/2.9/5.5V
Operating Supply Voltage (min)
1.72/2.7/3.13V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Package
144LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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this register to a channel priority level (non-zero value) selects the corresponding Initial Stack Pointer
Registers XGISP74 or XGISP31 (see
Module Base +0x0005
Read: Anytime
Write: Anytime
10.3.1.5
The XGISP74 register is intended to point to the stack region that is used by XGATE channels of priority
7 to 4. Every time a thread of such priority is started, RISC core register R7 will be initialized with the
content of XGISP74.
Module Base +0x0006
Read: Anytime
Write: Only if XGATE requests are disabled (XGE = 0) and idle (XGCHID = $00))
Freescale Semiconductor
XGISPSEL[1:0]
Reset
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Reset
Field
W
R
1-0
W
R
15
0
Register select— Determines whether XGISP74, XGISP31, or XGVBR is mapped to “Module Base +0x0006”.
See
XGATE Initial Stack Pointer for Interrupt Priorities 7 to 4 (XGISP74)
Figure 10-7. XGATE Initial Stack Pointer for Interrupt Priorities 7 to 4 (XGISP74)
0
0
7
14
0
Table
= Unimplemented or Reserved
Figure 10-6. XGATE Initial Stack Pointer Select Register (XGISPSEL)
13
0
10-6.
XGISPSEL[1:0]
= Unimplemented or Reserved
0
0
6
12
0
Table 10-6. XGISP74, XGISP31, XGVBR Mapping
3
2
1
0
MC9S12XE-Family Reference Manual Rev. 1.23
Table 10-5. XGISPSEL Field Descriptions
11
0
Table
0
0
5
10
0
Register Mapped to “Module Base +0x0006“
10-6).
0
9
XGISP74[15:1]
0
0
4
0
8
Description
Reserved
XGISP74
XGISP31
XGVBR
0
7
0
0
3
6
0
0
5
0
0
2
0
4
Chapter 10 XGATE (S12XGATEV3)
0
3
0
1
XGISPSEL[1:0]
0
2
1
0
0
0
0
0
0
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