C8051F353-GM Silicon Laboratories Inc, C8051F353-GM Datasheet - Page 99

• Manufacturer Part Number: C8051F353-GM
• Description: IC 8051 MCU 8K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F35xr

Specifications of C8051F353-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x16b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F350DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 16-bit
• On-chip Dac: 2-ch x 8-bit
• No. Of I/o's: 17
• Ram Memory Size: 768Byte
• Cpu Speed: 50MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Package: 28QFN
• Device Core: 8051
• Family Name: C8051F35x
• Maximum Speed: 50 MHz
• Data Rom Size: 128 B
• Height: 0.88 mm
• Length: 5 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Width: 5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1083 - DEV KIT FOR F350/351/352/353
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1273

11. Memory Organization and SFRs
The memory organization of the C8051F350/1/2/3 is similar to that of a standard 8051. There are two sep-
arate memory spaces: program memory and data memory. Program and data memory share the same
address space but are accessed via different instruction types. The memory map is shown in Figure 11.1.
11.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051F350/1/2/3 implements 8 kB of this pro-
gram memory space as in-system, re-programmable Flash memory, organized in a contiguous block from
addresses 0x0000 to 0x1DFF. Addresses above 0x1DFF are reserved.
Program memory is normally assumed to be read-only. However, the C8051F350/1/2/3 can write to pro-
gram memory by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX write instruc-
tion. This feature provides a mechanism for updates to program code and use of the program memory
space for non-volatile data storage. Refer to Section “15. Flash Memory’ on page 121 for further details.
0x1DFF
0x1FFF
0x1E00
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Byte Sectors)
RESERVED
(In-System
8 kB Flash
(Flash)
Figure 11.1. Memory Map
0xFFFF
0x01FF
0x0200
0x0000
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.1
0x0000 to 0x01FF, wrapped
XRAM - 512 Bytes
(accessable using MOVX
Same 512 bytes as from
(Indirect Addressing
on 512-byte boundaries
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
C8051F350/1/2/3
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
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