AT32UC3A0512-ALTTA Atmel, AT32UC3A0512-ALTTA Datasheet - Page 374

• Manufacturer Part Number: AT32UC3A0512-ALTTA
• Description: IC MCU AVR32 512K FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0512-ALTTA

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

27.6.4.1
32058J–AVR32–04/11
– NRD Waveform
Read Waveforms
The read cycle is shown on
The read cycle starts with the address setting on the memory address bus, i.e.:
Figure 27-9. Standard Read Cycle
The NRD signal is characterized by a setup timing, a pulse width and a hold timing.
1. NRD_SETUP: the NRD setup time is defined as the setup of address before the NRD
2. NRD_PULSE: the NRD pulse length is the time between NRD falling edge and NRD ris-
3. NRD_HOLD: the NRD hold time is defined as the hold time of address after the NRD ris-
NBS0, NBS1,
falling edge;
ing edge;
ing edge.
A0, A1
{A[25:2], A1, A0} for 8-bit devices
{A[25:2], A1} for 16-bit devices
A[25:2] for 32-bit devices.
A[25:2]
D[15:0]
CLK_SMC
NRD
NCS
NCS_RD_SETUP
NRD_SETUP
Figure
27-9.
NCS_RD_PULSE
NRD_PULSE
NRD_CYCLE
NRD_HOLD
AT32UC3A
NCS_RD_HOLD
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