MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 175

• Manufacturer Part Number: MC908GR16VFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ARUN— Arbiter Counter Running Flag
AROVFL— Arbiter Counter Overflow Bit
ARD8— Arbiter Counter MSB
14.9.2 ESCI Arbiter Data Register
ARD7–ARD0 — Arbiter Least Significant Counter Bits
14.9.3 Bit Time Measurement
Two bit time measurement modes, described here, are available according to the state of ACLK.
Freescale Semiconductor
1. ACLK = 0 — The counter is clocked with one quarter of the bus clock. The counter is started when
2. ACLK = 1 — The counter is clocked with one half of the ESCI input clock generated by the ESCI
This read-only bit indicates the arbiter counter is running. Reset clears ARUN.
This read-only bit indicates an arbiter counter overflow. Clear AROVFL by writing any value to
SCIACTL. Writing 0s to AM1 and AM0 resets the counter keeps it in this idle state. Reset clears
AROVFL.
This read-only bit is the MSB of the 9-bit arbiter counter. Clear ARD8 by writing any value to SCIACTL.
Reset clears ARD8.
These read-only bits are the eight LSBs of the 9-bit arbiter counter. Clear ARD7–ARD0 by writing any
value to SCIACTL. Writing 0s to AM1 and AM0 permanently resets the counter and keeps it in this idle
state. Reset clears ARD7–ARD0.
1 = Arbiter counter running
0 = Arbiter counter stopped
1 = Arbiter counter overflow has occurred
0 = No arbiter counter overflow has occurred
a falling edge on the RxD pin is detected. The counter will be stopped on the next falling edge.
ARUN is set while the counter is running, AFIN is set on the second falling edge on RxD (for
instance, the counter is stopped). This mode is used to recover the received baud rate. See
14-21.
prescaler. The counter is started when a 0 is detected on RxD (see
enabling the bit time measurement with ACLK = 1 leads to immediate start of the counter (see
Figure
measure the length of a received break.
14-23). The counter will be stopped on the next rising edge of RxD. This mode is used to
Address: $000B
Reset:
Read:
Write:
ARD7
Bit 7
Figure 14-20. ESCI Arbiter Data Register (SCIADAT)
0
= Unimplemented
ARD6
6
0
MC68HC908GR16 Data Sheet, Rev. 5.0
ARD5
5
0
ARD4
4
0
ARD3
3
0
ARD2
2
0
Figure
ARD1
1
0
14-22). A 0 on RxD on
ARD0
Bit 0
0
ESCI Arbiter
Figure
175