MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 247

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MC908GR16VFAE

Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR16VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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This condition states that as long as V
V
then the COP will be disabled. In the latter situation, after V
removed from the IRQ pin in the interest of freeing the IRQ for normal functionality in monitor mode.
19.3.1.2 Forced Monitor Mode
If entering monitor mode without high voltage on IRQ, then all port B pin requirements and conditions,
including the PTB4 frequency divisor selection, are not in effect. This is to reduce circuit requirements
when performing in-circuit programming.
An external oscillator of 9.8304 MHz is required for a baud rate of 9600, as the internal bus frequency is
automatically set to the external frequency divided by four.
When the forced monitor mode is entered the COP is always disabled regardless of the state of IRQ or
RST.
19.3.1.3 Monitor Vectors
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt
than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 19-2
19.3.1.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
Freescale Semiconductor
TST
is applied to RST after the initial reset to get into monitor mode (when V
summarizes the differences between user mode and monitor mode.
User
Monitor
Modes
Once the reset vector has been programmed, the traditional method of
applying a voltage, V
START
BIT
Vector High
$FFFE
$FEFE
Reset
BIT 0
BIT 1
Vector Low
Figure 19-13. Monitor Data Format
$FFFF
$FEFF
Reset
MC68HC908GR16 Data Sheet, Rev. 5.0
TST
BIT 2
Table 19-2. Mode Differences
TST
, to IRQ must be used to enter monitor mode.
is maintained on the IRQ pin after entering monitor mode, or if
BIT 3
Vector High
$FEFC
$FFFC
Break
BIT 4
NOTE
Functions
BIT 5
Vector Low
TST
$FFFD
$FEFD
Break
BIT 6
is applied to the RST pin, V
BIT 7
Vector High
$FEFC
$FFFC
STOP
SWI
BIT
TST
START
NEXT
BIT
was applied to IRQ),
Vector Low
$FFFD
$FEFD
SWI
Monitor ROM (MON)
TST
can be
247

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