MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 197

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MC908GR16VFAE

Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR16VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
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16.4 Functional Description
Figure 16-2
The SPI module allows full-duplex, synchronous, serial communication between the MCU and peripheral
devices, including other MCUs. Software can poll the SPI status flags or SPI operation can be interrupt
driven.
If a port bit is configured for input, then an internal pullup device may be enabled for that port bit. See
12.4.3 Port C Input Pullup Enable
The following paragraphs describe the operation of the SPI module.
16.4.1 Master Mode
The SPI operates in master mode when the SPI master bit, SPMSTR, is set.
Only a master SPI module can initiate transmissions. Software begins the transmission from a master SPI
module by writing to the transmit data register. If the shift register is empty, the byte immediately transfers
to the shift register, setting the SPI transmitter empty bit, SPTE. The byte begins shifting out on the MOSI
pin under the control of the serial clock. See
The SPR1 and SPR0 bits control the baud rate generator and determine the speed of the shift register.
(See
master also controls the shift register of the slave peripheral.
Freescale Semiconductor
Addr.
$0010
$0011
$0012
16.13.2 SPI Status and Control
SPI Status and Control
Register Name
summarizes the SPI I/O registers and
SPI Control Register
Register (SPSCR)
SPI Data Register
Configure the SPI modules as master or slave before enabling them.
Enable the master SPI before enabling the slave SPI. Disable the slave SPI
before disabling the master SPI. See
See page 212.
See page 213.
See page 215.
(SPCR)
(SPDR)
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Figure 16-2. SPI I/O Register Summary
Register.
SPRIE
SPRF
MC68HC908GR16 Data Sheet, Rev. 5.0
Bit 7
R7
T7
R
0
0
Register.) Through the SPSCK pin, the baud rate generator of the
= Reserved
ERRIE
Figure
R6
T6
R
6
0
0
NOTE
Figure 16-3
SPMSTR
16-4.
16.13.1 SPI Control
OVRF
R5
T5
5
1
0
MODF
CPOL
Unaffected by reset
shows the structure of the SPI module.
R4
T4
4
0
0
= Unimplemented
CPHA
SPTE
R3
T3
3
1
1
Register.
MODFEN
SPWOM
R2
T2
2
0
0
Functional Description
SPR1
SPE
R1
T1
1
0
0
SPTIE
SPR0
Bit 0
R0
T0
0
0
197

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